RLP03N06CLE Просмотр технического описания (PDF) - Intersil
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RLP03N06CLE Datasheet PDF : 9 Pages
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Data Sheet
RLD03N06CLE, RLD03N06CLESM,
RLP03N06CLE
July 1999 File Number 3948.5
0.3A, 60V, 6 Ohm, ESD Rated, Current
Limited, Voltage Clamped, Logic Level
N-Channel Power MOSFETs
These are intelligent monolithic power circuits which
incorporate a lateral bipolar transistor, resistors, zener
diodes and a power MOS transistor. The current limiting of
these devices allow it to be used safely in circuits where a
shorted load condition may be encountered. The drain to
source voltage clamping offers precision control of the circuit
voltage when switching inductive loads. The “Logic Level”
gate allows this device to be fully biased on with only 5V
from gate to source, thereby facilitating true on-off power
control directly from logic level (5V) integrated circuits.
These devices incorporate ESD protection and are designed
to withstand 2kV (Human Body Model) of ESD.
Formerly developmental type TA49028.
Ordering Information
PART NUMBER
PACKAGE
BRAND
RLD03N06CLE
TO-251AA
03N06C
RLD03N06CLESM TO-252AA
03N06C
RLP03N06CLE
TO-220AB
03N06CLE
NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-252AA variant in tape and reel, i.e. RLD03N06CLESM9A.
Packaging
JEDEC TO-251AA
DRAIN
(FLANGE)
SOURCE
DRAIN
GATE
Features
• 0.30A, 60V
• rDS(ON) = 6.0Ω
• Built in Current Limit ILIMIT 0.140 to 0.210A at 150oC
• Built in Voltage Clamp
• Temperature Compensating PSPICE® Model
• 2kV ESD Protected
• Controlled Switching Limits EMI and RFI
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
JEDEC TO-252AA
DRAIN
(FLANGE)
GATE
SOURCE
DRAIN
(FLANGE)
JEDEC TO-220AB
SOURCE
DRAIN
GATE
6-418
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE® is a registered trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
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