D6002 Просмотр технического описания (PDF) - Unspecified

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производитель

D6002

Radio Controlled Receiver IC

Unspecified 

Silicore

BLOCK DIAGRAM

CD1 CD2

O1 O2

IC CD3

CDEM VDD

IA1

IA2

RF Amp

+

Post Amp -

C o mp arator

Vc c

B ias

(RF Amp)

(Post Amp)

Gain Peak

Control Detector

PON GND1

GND3 GND2

CAGC

OD1

OD2

STOP

D6002

PIN DEFINITION

Pin Symbol

Description

1 GND2 Ground 2 (RF stages).

Pin Symbol

Description

11 PON Power on

2 CD1 Decoupling capacitor C1

3 CD2 Decoupling capacitor C1

12 STOP AGC stop

13 CAGC AGC capacitor

4

IA1 Antenna input 1

5

Vcc Supply voltage

14 CDEM Demodulation capacitor

15 GND3 Ground 3(Post amplifier)

6

IA2 Antenna input 2

16

NC Not connected

7

VDD

Supply voltage for

comparator and output stage

17 CD3 Decoupling capacitor C2

8 OD1 Data output 1 (pull down)

18

IC Crystal input

9 OD2 Data output 2 (pull up)

19

O2 Non-inverting RF output

10 GND1 Ground 1(output stages)

20

O1 Inverting RF output

PON Power on/off control

If PON is connected to GND/Vcc the D6002 receiver is active/stand-by.

OD1 Data output 1

The output signal can directly decoded by a microprocessor.

The output OD1 is a PNP open collector stage with high active logic. The

connection with an external resistor of 100k to GND is possible.

OD2 Data output 2

The output OD2 is a NPN open collector stage with low active logic. The connection

with an external resistor of 100k to Vcc is possible.

SHAOXING SILICORE TECHNOLOGY CO.,LTD

2/6

www. Silicore. com. cn

CHMC

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