ADM1066 Просмотр технического описания (PDF) - Analog Devices
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ADM1066 Datasheet PDF : 36 Pages
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ADM1066
POWERING THE ADM1066
The ADM1066 is powered from the highest voltage input on
either the positive-only supply inputs (VPx) or the high voltage
supply input (VH). This technique offers improved redundancy
because the device is not dependent on any particular voltage rail
to keep it operational. The same pins are used for supply fault
detection (see the Supply Supervision section). A VDD arbitrator
on the device chooses which supply to use. The arbitrator can
be considered an OR’ing of five low dropout regulators (LDOs)
together. A supply comparator chooses the highest input to provide
the on-chip supply. There is minimal switching loss with this
architecture (~0.2 V), resulting in the ability to power the
ADM1066 from a supply as low as 3.0 V. Note that the supply on
the VXx pins cannot be used to power the device.
An external capacitor to GND is required to decouple the on-chip
supply from noise. This capacitor should be connected to the
VDDCAP pin, as shown in Figure 21. The capacitor has another
use during brownouts (momentary loss of power). Under these
conditions, when the input supply (VPx or VH) dips transiently
below VDD, the synchronous rectifier switch immediately turns
off so that it does not pull VDD down. The VDD capacitor can
then act as a reservoir to keep the device active until the next
highest supply takes over the powering of the device. A 10 µF
capacitor is recommended for this reservoir/decoupling function.
The VH input pin can accommodate supplies up to 14.4 V, which
allows the ADM1066 to be powered using a 12 V backplane supply.
In cases where this 12 V supply is hot swapped it is recommended
that the ADM1066 not be connected directly to the supply. Suitable
precautions, such as the use of a hot swap controller, should be
taken to protect the device from transients that could cause
damage during hot swap events.
Data Sheet
When two or more supplies are within 100 mV of each other,
the supply that first takes control of VDD keeps control. For
example, if VP1 is connected to a 3.3 V supply, VDD powers up
to approximately 3.1 V through VP1. If VP2 is then connected to
another 3.3 V supply, VP1 still powers the device, unless VP2
goes 100 mV higher than VP1.
VDDCAP
VP1
IN
OUT
4.75V
LDO
EN
VP2
IN
OUT
4.75V
LDO
EN
VP3
IN
OUT
4.75V
LDO
EN
VP4
IN
OUT
4.75V
LDO
EN
INTERNAL
VH
IN
OUT
DEVICE
4.75V
SUPPLY
LDO
EN
SUPPLY
COMPARATOR
Figure 21. VDD Arbitrator Operation
SLEW RATE CONSIDERATION
When the ambient temperature of operation is less than
approximately −20°C, and in the event of a power loss where all
supply inputs fail for less than a few hundreds of milliseconds
(for example, due to a system supply brownout), it is recommended
that the supply voltage recovers with a ramp rate of at least
1.5 V/ms or less than 0.5 V/ms.
Rev. F | Page 14 of 36
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