ADIS16204 Просмотр технического описания (PDF) - Analog Devices

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ADIS16204

Programmable High-g Digital Impact Sensor and Recorder

Analog Devices 

ADIS16204

TIMING SPECIFICATIONS

TA = +25°C, VCC = +3.3 V, unless otherwise noted.

Table 2.

Parameter

Description

Min1

Typ

Max1

Unit

fSCLK

Fast mode2

0.01

2.5

MHz

Normal mode2

0.01

1.0

MHz

tDATARATE

Chip select period, fast mode2

40

μs

Chip select period, normal mode2

100

μs

tCSHIGH

Chip select high

1/fSCLK

tCS

Chip select to clock edge

48.8

ns

tDAV

Data output valid after SCLK edge

tDSU

Data input setup time before SCLK rising edge

tDHD

Data input hold time after SCLK rising edge

tDF

Data output fall time

tDR

Data output rise time

E tSFS

CS high after SCLK edge

1 Guaranteed by design; typical specifications are not tested or guaranteed.

2 Based on sample rate selection.

T tDATARATE

E CS

L SCLK

Figure 2. SPI Chip Select Timing

100

24.4

48.8

5

12.5

5

12.5

5

CS

O SCLK

S DOUT

OB DIN

tCS

1

MSB

W/R

2

3

4

5

6

tDAV

DB14

tDSU

DB13

DB12

tDHD

DB11

DB10

A5

A4

A3

A2

15

16

tSFS

DB2

DB1

LSB

D2

D1

LSB

Figure 3. SPI Timing

(Utilizing SPI Settings Typically Identified as Phase = 1, Polarity = 1)

ns

ns

ns

ns

ns

ns

Rev. B | Page 5 of 24

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