AD6657EBZ Просмотр технического описания (PDF) - Analog Devices
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AD6657EBZ Datasheet PDF : 32 Pages
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Data Sheet
AD6657
Parameter
LOGIC INPUT (MODE)1
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
LOGIC INPUT (PDWN)2
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
DIGITAL OUTPUTS (LVDS)
Differential Output Voltage (VOD)
Output Offset Voltage (VOS)
1 Pull up.
2 Pull down.
Temperature Min
Typ
Full
1.22
Full
0
Full
−10
Full
40
Full
26
Full
2
Full
1.22
Full
0
Full
−90
Full
−10
Full
26
Full
5
Full
247
Full
1.125
Max
Unit
2.1
V
0.6
V
+10
μA
132
μA
kΩ
pF
2.1
V
0.6
V
−134
μA
+10
μA
kΩ
pF
454
mV
1.375
V
SWITCHING SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, fS = 185 MSPS, 1.75 V p-p differential input, VIN = −1.0 dBFS differential input, and default SPI, unless
otherwise noted.
Table 4.
Parameter
CLOCK INPUT PARAMETERS
Input Clock Rate
Conversion Rate1
CLK Pulse Width High (tCH)
Aperture Delay (tA)
Aperture Uncertainty (Jitter, tJ)
DATA OUTPUT PARAMETERS
Data Propagation Delay (tPD)
DCO Propagation Delay (tDCO)
DCO to Data Skew (tSKEW)
Pipeline Delay (Latency)
With NSR Enabled
Wake-Up Time2 (from Standby)
Wake-Up Time2 (from Power Down)
OUT-OF-RANGE RECOVERY TIME
Temperature Min
Typ
Max
Unit
Full
Full
40
Full
Full
Full
625
185
200
2.7
1.3
0.13
MHz
MSPS
ns
ns
ps rms
Full
3.0
4.35
5.7
Full
3.2
4.55
5.9
Full
−0.4
−0.2
0
Full
9
Full
12
Full
0.5
Full
350
Full
2
ns
ns
ns
Cycles
Cycles
μs
μs
Cycles
1 Conversion rate is the clock rate after the divider.
2 Wake-up time is dependent on the value of the decoupling capacitors.
Rev. B | Page 7 of 32
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