RTL8196E Просмотр технического описания (PDF) - Realtek Semiconductor

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RTL8196E

5-PORT 10/100M ETHERNET ROUTER NETWORK PROCESSOR

Realtek Semiconductor 

RTL8196E

Datasheet

6. Pin Descriptions

In this section the following abbreviations are used:

Upon Reset: Defined as a short time after the end of a hardware reset.

After Reset: Defined as the time after the specified ‘Upon Reset’ time.

I: Input

AI: Analog Input

O: Output

AO: Analog Output

I/O: Bi-Directional Input/Output

AI/O: Analog Bi-Directional Input/Output

P: Digital Power

AP: Analog Power

G: Digital Ground

AG: Analog Ground

IPD: Input Pin With Pull-Down Resistor

IPU: Input Pin With Pull-Up Resistor;

(Typical Value = 75K Ohm)

Pin Name

XI

XO

RESET#

TXOP_P[4:0]

TXON_P[4:0]

RXIP_P[4:0]

RXIN_P[4:0]

MD[15:0]

MA[13:0]

MCLK

MCLKE

MCS0#

BS[1:0]

RAS#

CAS#

Table 1. Pin Descriptions

Pin No.

Type Description

Clock & Reset

111

I 25MHz Crystal Clock, 25MHz External clock Input, or

40MHz External Clock Input.

110

O 25MHz Crystal Clock Output.

118

I System External Reset.

10/100M Ethernet Physical Layer

26, 24, 15, 13, 5

AO 10/100M Ethernet Physical Layer Transmit Pair.

27, 23, 16, 12, 6

For differential data transmission.

28, 22, 18, 11, 7

AI 10/100M Ethernet Physical Layer Receive Pair.

29, 21, 19, 10, 8

For differential data reception.

Memory Interface

78, 77, 76, 75, 74, 73,

72, 71, 55, 56, 57, 58,

59, 60, 61, 62

I/O Data for DDR DRAM and SDR DRAM.

47, 37, 38, 39, 42, 43,

44, 45, 46, 48, 49, 50,

51, 52

O Address for DDR DRAM and SDR DRAM

SDR DRAM Control

65

O SDR DRAM Clock.

85

O SDR DRAM Clock Enable.

83

O SDR DRAM Chip Select 0.

35, 36

O SDR DRAM Chip Bank Select [1:0].

80

O Raw Address Strobe (RAS#) for SDR DRAM.

81

O Column Address Strobe for SDR DRAM.

5-Port 10/100M Ethernet Router Network Processor

6

Track ID: JATR-3375-16 Rev. 1.0

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