HFA3841 Просмотр технического описания (PDF) - Intersil

Номер в каталоге

Компоненты Описание

производитель

HFA3841

Wireless LAN Medium Access Controller

Intersil 

Preliminary - HFA3841

Special Hardware Functions for Port Pins

PJ0

SCK

MMI serial clock in or out

PJ1

SDO / SDIO

MMI serial data out or I/O

MOSI

SPI Master Out/Slave In

PJ2

SDI / MISO

MMI serial data in

SDDIR

MMI (SDIO) data direction

PJ3

SDE0

MMI serial device enable 0

PCS-

SPI/MMI transfer qualifier

PHYCS-

PHY chip select (3-3.5MB)

PJ4

SDE1

MMI serial device enable 1

SDDQ

MMI data delivery qualifier

SS-

SPI slave select

PJ5

MREQ-

MBUS request

PJ6

MGNT-

MBUS grant

LED2

LED 2 driver

PJ7

LED1

LED 1 driver

PK0

GPCK

GP serial port clock in or out

UHSIn

Async handshake in

PK1

GPDO

GP serial port data output

UTXD

Async transmit data

PK2

GPDI

GP serial port data input

URXD

Async receive data

PK3

GPDS0

GP device select 0

UHSOut

Async handshake out

PK4

GPDS1

GP device select 1

PK5

PDA

PHY (or MAC) data available

UWDET

Unique word detected

PK6

MBUSY

Medium busy

RATE0

Data Rate select 0

PK7

EDET

Energy (or modulation) detect

RATE1

Data Rate select 1

PL0

TXE

Transmitter enable

PL1

RXE

Receiver enable

PHYSLP

PHY sleep

PL2

PHYRES

PHY reset

PL3

SLOT

Slot time reference (in or out)

ANTSEL

Antenna select

PL4

MA19

MBUS address bit 19

LED0

LED 0 driver

PL5

MA20

MBUS address bit 20

PL6

MA21

MBUS address bit 21

PL7

TXR

Transmitter ready

Also for MicroWire

Or SPI Master In/Slave Out

Low while SDIO is driven as an output

Generally selects PHY controller

Asserted by hardware during transfer

For memory-mapped PHY controllers

For serial EPROM, synthesizer, etc.

Low for data on SDIO, high for address

In slave mode SCK is serial clock input

(Directly from I/O port)

(Directly from I/O port)

Indicates external async Rx ready

Indicates GP port async Rx ready

Qualifies RXD input to MAC controller

Output from MAC controller

CCA status (PHY-dependent source)

Can drive “awake” LED

(Directly from I/O port)

(Directly from I/O port)

(Directly from I/O port)

For 1M byte SRAM

(Directly from I/O port)

For 2M byte SRAM

For 4M byte SRAM

6

Share Link: