ZXBM2001 Просмотр технического описания (PDF) - Zetex => Diodes
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ZXBM2001 Datasheet PDF : 10 Pages
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ZXBM2001
ZXBM2002 ZXBM2003
4. SPD - Speed control voltage input
This pin provides control over the Fan Motor speed by
varying the Pulse Width Modulated (PWM) drive ratio
at the Ph1 and Ph2 outputs. This control signal can take
the form of either a voltage input of nominal range 2V
to 1V, representing 0% to 100% drive respectively, or
alternatively a thermistor can be attached to this pin to
control the voltage. A third method of speed control is
available by the application of an externally derived
PWM signal and this will be discussed under the CPWM
pin.
This pin has an internal potential divider between an
internal 2.0V reference and Gnd (see Block Diagram)
designed to hold the pin at approximately 1.5V. This
will represent a drive of nominally 50% PWM. For
thermal speed control a 100k NTC thermistor is
connected between the SPD and ground will provide a
drive nominally 70% at 25°C and 100% at 50°C. As the
thermistor is connected in parallel with the internal
resistor the non-linearity of an NTC thermistor is
largely taken out. A linearity of typically ±2.5% is
achievable.
Lower values of thermistor can be used if needed and
in this situation an external potential divider will be
needed to set the speed range. This will take the form of
a resistor from the SPD pint to Vcc and a resistor from
the SPD pin to Gnd. Full details are given in the
ZXBM200x series Application Note.
If speed control is not required this pin is can be left
open circuit for 50% drive or tied to ground by a 10k⍀
resistor to provide 100% drive.
If required this pin can also be used as an enable pin.
The application of a voltage of 2.0V to VCC will to force
the PWM drive fully off, in effect disabling the drive.
On the ZXBM2001 the Lock/FG pin is designed to be a
dual function pin to provide an indication of the Fans
rotational speed together with an indication of when
the Fan has failed rotating for whatever reason (Rotor
Locked condition). Under correct operating conditions,
and with the external pull-up in place, this pin will
provide an output signal whose frequency will be twice
that of the rotational frequency of the fan. Should the
fan itself stop rotating for any reason, i.e. an
obstruction in the fan blade or a seized bearing, then
the device will enter a Rotor Locked condition. In this
condition the Lock/FG pin will go high (regardless of
the state of the Hall sensor) when the CLCK pin reaches
the VTHH threshold and will remain high until the fan
blades start rotating again.
On the ZXBM2002 variant this pin is Lock. During
normal operation the signal will be low and during a
Locked Rotor condition the pin will go high when the
CLCK pin reaches the VTHH threshold.
For the ZXBM2003 variant this pin is FG. This signal is a
buffered and inverted output of the Hall signal and
therefore provides an output signal whose frequency
will be twice that of the rotational frequency of the fan.
7. CLCK - Locked Rotor timing capacitor
When in a Locked Rotor condition as described above
the Ph1 and Ph2 drive outputs go into a safe drive mode
to protect the external drive devices and the motor
windings. This condition consists of driving the motor
for a short period then waiting for a longer period
before trying again. The frequency at which this takes
place is determined by the size of the capacitor applied
to this CLCK pin. For a 12V supply a value of 1.0uF will
typically provide an ‘On’ (drive) period of 0.33s and an
‘Off’ (wait) period of 4.0s, giving an On:Off ratio of 1:12.
5. GND - Ground
This is the device supply ground return pin and will
generally be the most negative supply pin to the fan.
6. LOCK/FG - Locked Rotor error output /
Frequency Generator (speed) output
This pin is an open collector output and so will require
an external pull up resistor for correct operation.
The CLCK timing periods are determined by the
following equations:
VTHH × CLCK
Tlock =
ILCKC
(VTHH − VTHL) × CLCK
Toff =
ILCKD
(VTHH − VTHL) × CLCK
Ton =
ILCKC
Where VTHH and VTHL are the CLCK pin threshold
voltages and ILCKC and ILCKD are the charge and
discharge currents.
ISSUE 4 - OCTOBER 2004
5
SEMICONDUCTORS
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