UA78S40(2006) Просмотр технического описания (PDF) - ON Semiconductor
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Компоненты Описание
производитель
UA78S40 Datasheet PDF : 7 Pages
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Vin
15V
+
100
9
UA78S40
RSC
0.30
CT
1800
pF
D45H8
1N5822
Vout
−15V/500mA
100
50mH L
270
100 + CO
10
11
12
13
14
15
16
VCC
CT
Ipk
Oscillator
SQ
1.25V
Reference
−
Comp.
+
− Op
+Amp
R
170
D1
R1
8
1.5k
R2
18k
7
6
5
4
3
2
1
Figure 8. Inverting Converter
Design Formula Table
Calculation
ton
toff
(ton + toff) max
CT
Ipk(switch)
Step−Down
Vout + VF
Vin(min) − Vsat − Vout
I
fmin
4 x 10 5 ton
2 Iout(max)
Step−Up
Vout − VF Vin(min)
Vin(min) Vsat
I
fmin
4 x 10 5 ton
2 Iout(max)
ton − toff
toff
RSC
0.33
Ipk(switch)
0.33
Ipk(switch)
L(min)
Vin(min) − Vsat − Vout
Ipk(switch)
ton(max)
Vin(min) − Vsat
Ipk(switch)
ton(max)
CO
Ipk(switch) (ton + toff)
≈ Iout ton
8 Vripple(pp)
Vripple
Vsat = Saturation voltage of the output switch. VF = Forward voltage drop of the ringback rectifier.
Inverting
Vout + VF
Vin(min) − Vsat
I
fmin
4 x 10 5 ton
2 Iout(max)
ton + toff
toff
0.33
Ipk(switch)
Vin(min) − Vsat
Ipk(switch)
ton(max)
≈ Iout ton
Vripple
The following power supply characteristics must be chosen:
Vin − Nominal input voltage. If this voltage is not constant, then use Vin(max) for step−down and Vin(min) for step−up and inverting convertor.
ǒ Ǔ Vout − Desired output voltage: Vout = 1.25
1
)
R2
R1
for step−down and step−up:
Vout
+
1.25 R2
R1
for inverting.
Iout − Desired output current.
fmin − Minimum desired output switching frequency at the selected values for Vin and IO.
Vripple(pp) − Desired peak−to−peak output ripple voltage. In practice, the calculated value will need to be increased due to the capacitor’s equivalent
series resistance and board layout. The ripple voltage should be kept to a low value since it will directly effect the line and load regulation.
See Application Note AN920 for further information
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