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CH1782A Просмотр технического описания (PDF) - Cermetek Microelectronics

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CH1782A
Cermetek
Cermetek Microelectronics Cermetek
CH1782A Datasheet PDF : 19 Pages
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Cermetek Microelectronics, Inc.
submitting the design to a test house or consultant.
Call Cermetek for assistance.
SUPPORT FEATURES
AT Command Set. A 40-character command line is
supported. The command line starts with AT and
may contain standard or enhanced commands. The
commands are compatible with EIA Document
TR302.2/88-08006.
Serial Host Interface. The serial interface is a V.24
(EIA-232) compatible interface. Ten Bits total: 1 start
bit, 1 stop bit, and eight data bits which can be either
eight bits with no parity or seven odd or even with
parity. The start bit is LOW going. RXD and TXD
data is non-inverted. See pin description in Table 2.
Speaker Interface. The SPK output reflects the
receiver analog input and provides a signal that can
be used to monitor call progress. The SPK signal can
drive a 300 load directly. Typically, the SPK signal
is input into an audio power amplifier and the
amplifier, in turn, drives the speaker coil. The
speaker is activated with the ATMn command. The
speaker volume is adjusted using the ATLn
command, where n is 0,1,2,or 3. Increasing numbers
correspond to higher volume. Figure 5 indicates one
method of driving an external 8 speaker.
Phone Control. Cermetek ’s CH1782A contains a pin
called Voice or Data (V/D). The V/D pin toggles high
when the modem goes off hook. This pin can be used
CH1782A Family of Ultra Small Modem Modules V.22bis-2400bps
to activate a relay which can switch a telephone on or
off the Tip and Ring incoming PSTN lines. This
feature allows any telephone associated with the
CH1782A to be disconnected when a data call is in
progress, thereby preventing the data from being
disturbed by an inadvertent telephone pick-up. See
Figure 2.
Speed and Parity Selection. Prior to call initiation,
the host controller trains the modem to the host
speed (2400,1200 or 300bps) and parity (odd, even,
mark, space, or none) via a host-initiated training
sequence. This training also sets the speed of the
data for originate calls. The CH1782A will
automatically adjust to the originator’s speed when
answering calls.
The CH1782A matches the host’s parity when it
returns status messages to the host. During a data
connection, however, the modem passes parity
through without interpretation or alteration.
Sleep Mode. To minimize power consumption, the
CH1782A includes a power down feature called
Sleep Mode. When activated, the CH1782A will
automatically enter Sleep Mode after 0 to 254
seconds of inactivity. The inactivity delay is selected
using the ATS24 command. The CH1782A is
delivered from the factory with a 5 second inactivity
delay enabled (i.e., ATS24=5). The CH1782A
returns to normal operation when a ring signal is
received or upon an input low signal on the TXD pin.
ATS24=255 disables the Sleep Mode and is the
default if no value is set in register S24.
2
1
CH1782A
+5V
12
V/D
IN914
10K
RING RJ-11 OPTIONAL
TIP Jack PHONE
TIP
RING
RJ-11 TELEPHONE
Jack LINE
V/D pin is used to create a separate port for telephone connection sharing of the tip and ring
lines. V/D is TTL compatible (IOL = 1.6mA, VOL = 0.4V) and is active during data connection
thereby isolating the telephone from the tip and ring lines. (Note: the relay chosen must meet
the appropriate regulatory agency requirements).
Figure 2. Use of V/D pin to ensure that a shared PSTN line does not inadvertently disturb
an active data call.
2002 Cermetek Microelectronics, Inc.
Page 2
Document No. 607-0009 Revision C (01/03)

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