HEF4020BTD Просмотр технического описания (PDF) - Philips Electronics

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HEF4020BTD

14-stage binary counter

Philips Electronics 

Philips Semiconductors

14-stage binary counter

DESCRIPTION

The HEF4020B is a 14-stage binary ripple counter with a

clock input (CP), an overriding asynchronous master reset

input (MR) and twelve fully buffered outputs (O0, O3 to

O13). The counter advances on the HIGH to LOW

transition of CP. A HIGH on MR clears all counter stages

and forces all outputs LOW, independent of the state of

CP. Each counter stage is a static toggle flip-flop. A feature

of the HEF4020B is: high speed (typ. 35 MHz at

VDD = 15 V).

Product specification

HEF4020B

MSI

Fig.1 Functional diagram.

Fig.2 Pinning diagram.

HEF4020BP(N): 16-lead DIL; plastic

(SOT38-1)

HEF4020BD(F): 16-lead DIL; ceramic (cerdip)

(SOT74)

HEF4020BT(D): 16-lead SO; plastic

(SOT109-1)

( ): Package Designator North America

PINNING

CP

MR

O0, O3 to O13

clock input (HIGH to LOW edge

triggered)

master reset input (active HIGH)

parallel outputs

FAMILY DATA, IDD LIMITS category MSI

See Family Specifications

January 1995

2

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