HI5905EVAL2 Просмотр технического описания (PDF) - Intersil

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HI5905EVAL2

14-Bit, 5MSPS A/D Converter

Intersil 

HI5905

Full Power Input Bandwidth (FPBW)

Full power input bandwidth is the analog input frequency at

which the amplitude of the digitally reconstructed output has

decreased 3dB below the amplitude of the input sinewave.

The input sinewave has an amplitude which swings from -fS

to +fS . The bandwidth given is measured at the specified

sampling frequency.

Timing Definitions

Refer to Figure 1, Internal Circuit Timing, and Figure 2,

Input-To-Output Timing, for these definitions.

Aperture Delay (tAP)

Aperture delay is the time delay between the external

sample command (the falling edge of the clock) and the time

at which the signal is actually sampled. This delay is due to

internal clock path propagation delays.

Aperture Jitter (tAJ)

Aperture Jitter is the RMS variation in the aperture delay due

to variation of internal clock path delays.

Data Hold Time (tH)

Data hold time is the time to where the previous data (N - 1)

is still valid.

Data Output Delay Time (tOD)

Data output delay time is the time to where the new data (N)

is valid.

Data Latency (tLAT)

After the analog sample is taken, the digital data is output on

the bus at the third cycle of the clock. This is due to the

pipeline nature of the converter where the data has to ripple

through the stages. This delay is specified as the data

latency. After the data latency time, the data representing

each succeeding sample is output at the following clock

pulse. The digital data lags the analog input sample by 4

clock cycles.

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