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HI5905EVAL2

14-Bit, 5MSPS A/D Converter

Intersil 

HI5905

Supply and Ground Considerations

The HI5905 has separate analog and digital supply and

ground pins to keep digital noise out of the analog signal

path. The part should be mounted on a board that provides

separate low impedance connections for the analog and

digital supplies and grounds. For best performance, the

supplies to the HI5905 should be driven by clean, linear

regulated supplies. The board should also have good high

frequency decoupling capacitors mounted as close as

possible to the converter. If the part is powered off a single

supply then the analog supply and ground pins should be

isolated by ferrite beads from the digital supply and ground

pins.

Refer to the Application Note AN9214, “Using Intersil High

Speed A/D Converters” for additional considerations when

using high speed converters.

Static Performance Definitions

Offset Error (VOS)

The midscale code transition should occur at a level 1/4 LSB

above half-scale. Offset is defined as the deviation of the

actual code transition from this point.

Full-Scale Error (FSE)

The last code transition should occur for an analog input that

is 3/4 LSB below positive full-scale with the offset error

removed. Full-scale error is defined as the deviation of the

actual code transition from this point.

Differential Linearity Error (DNL)

DNL is the worst case deviation of a code width from the

ideal value of 1 LSB.

Integral Linearity Error (INL)

INL is the worst case deviation of a code center from a best

fit straight line calculated from the measured data.

Power Supply Rejection Ratio (PSRR)

Each of the power supplies are moved plus and minus 5%

and the shift in the offset and gain error (in LSBs) is noted.

Dynamic Performance Definitions

Fast Fourier Transform (FFT) techniques are used to evaluate

the dynamic performance of the HI5905. A low distortion sine

wave is applied to the input, it is coherently sampled, and the

output is stored in RAM. The data is then transformed into the

frequency domain with an FFT and analyzed to evaluate the

dynamic performance of the A/D. The sine wave input to the

part is -0.5dB down from full-scale for all these tests. SNR and

SINAD are quoted in dB. The distortion numbers are quoted in

dBc (decibels with respect to carrier) and DO NOT include any

correction factors for normalizing to full scale.

Signal-to-Noise Ratio (SNR)

SNR is the measured RMS signal to RMS noise at a

specified input and sampling frequency. The noise is the

RMS sum of all of the spectral components except the

fundamental and the first five harmonics.

Signal-to-Noise + Distortion Ratio (SINAD)

SINAD is the measured RMS signal to RMS sum of all

other spectral components below the Nyquist frequency,

fS/2, excluding DC.

Effective Number Of Bits (ENOB)

The effective number of bits (ENOB) is calculated from the

SINAD data by:

ENOB = (SINAD + VCORR-1.76)/6.02

where: VCORR = 0.5dB (Typical)

VCORR adjusts the ENOB for the amount the input is below

fullscale.

Total Harmonic Distortion (THD)

THD is the ratio of the RMS sum of the first 5 harmonic

components to the RMS value of the fundamental input

signal.

2nd and 3rd Harmonic Distortion

This is the ratio of the RMS value of the applicable

harmonic component to the RMS value of the fundamental

input signal.

Spurious Free Dynamic Range (SFDR)

SFDR is the ratio of the fundamental RMS amplitude to the

RMS amplitude of the next largest spur or spectral

component (excluding the first 5 harmonic components) in

the spectrum below fS/2.

Intermodulation Distortion (IMD)

Nonlinearities in the signal path will tend to generate

intermodulation products when two tones, f1 and f2 , are

present at the inputs. The ratio of the measured signal to

the distortion terms is calculated. The terms included in the

calculation are (f1 + f2), (f1 - f2), (2f1), (2f2), (2f1 + f2), (2f1 -

f2), (f1 + 2f2), (f1 - 2f2). The ADC is tested with each tone

6dB below full scale.

Transient Response

Transient response is measured by providing a fullscale

transition to the analog input of the ADC and measuring the

number of cycles it takes for the output code to settle within

14-bit accuracy.

Over-Voltage Recovery

Over-voltage Recovery is measured by providing a fullscale

transition to the analog input of the ADC which overdrives

the input by 200mV, and measuring the number of cycles it

takes for the output code to settle within 14-bit accuracy.

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