EVAL-AD7851CB(RevA) Просмотр технического описания (PDF) - Analog Devices
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EVAL-AD7851CB Datasheet PDF : 36 Pages
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AD7851–SPECIFICATIONS1, 2 A Grade: fCLKIN = 7 MHz (–40؇C to +85؇C), fSAMPLE = 333 kHz; K Grade: fCLKIN = 6 MHz
(0؇C to +85؇C), fSAMPLE = 285 kHz; A and K Grade: fCLKIN = 5 MHz (to +125؇C), fSAMPLE =
238 kHz; (AVDD = DVDD = +5.0 V ؎ 5%, REFIN/REFOUT = 4.096 V External Reference; SLEEP = Logic High; TA = TMIN to TMAX, unless otherwise noted)
Parameter
A1
K1
Units
Test Conditions/Comments
DYNAMIC PERFORMANCE
Signal-to-Noise + Distortion Ratio3 (SNR) 77
78
Total Harmonic Distortion (THD)
–86
–86
Peak Harmonic or Spurious Noise
–87
–87
Intermodulation Distortion (IMD)
Second Order Terms
–86
–90
Third Order Terms
–86
–90
Full Power Bandwidth
20
20
dB min
dB max
dB max
dB typ
dB typ
MHz typ
Typically SNR is 79.5 dB
VIN = 10 kHz, Sine Wave, fSAMPLE = 333 kHz
VIN = 10 kHz, Sine Wave, fSAMPLE = 333 kHz,
Typically –96 dB
VIN = 10 kHz, fSAMPLE = 333 kHz
fa = 9.983 kHz, fb = 10.05 kHz, fSAMPLE = 333 kHz
fa = 9.983 kHz, fb = 10.05 kHz, fSAMPLE = 333 kHz
@ 3 dB
DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
Unipolar Offset Error
Positive Full-Scale Error
Negative Full-Scale Error
Bipolar Zero Error
14
14
±2
±1
±2
±1
± 10
± 10
± 10
± 10
± 10
± 10
±1
±1
Bits
LSB max
LSB max
LSB max
LSB max
LSB typ
LSB typ
Guaranteed No Missed Codes to 14 Bits
Review: “Adjusting the Offset Calibration
Register” in the “Calibration Registers” section
of the data sheet.
ANALOG INPUT
Input Voltage Ranges
Leakage Current
Input Capacitance
0 V to VREF 0 V to VREF
± VREF/2
± VREF/2
Volts
Volts
±1
±1
20
20
µA max
pF typ
i.e., AIN(+) – AIN(–) = 0 V to VREF, AIN(–) can be
biased up but AIN(+) cannot go below AIN(–).
i.e., AIN(+) – AIN(–) = –VREF/2 to +VREF/2, AIN(–)
should be biased up and AIN(+) can go below
AIN(–) but cannot go below 0 V.
REFERENCE INPUT/OUTPUT
REFIN Input Voltage Range
Input Impedance
REFOUT Output Voltage
REFOUT Tempco
LOGIC INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN5
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Floating-State Leakage Current
Floating-State Output Capacitance5
Output Coding
4/VDD
150
4/VDD
150
3.696/4.496 3.696/4.496
50
50
V min/max
kΩ typ
V min/max
ppm/°C typ
Functional from 1.2 V
Resistor Connected to Internal Reference Node
VDD – 1.0
0.4
± 10
10
VDD – 1.0
0.4
± 10
10
V min
V max
µA max
pF max
VIN = 0 V or VDD
VDD – 0.4 VDD – 0.4
0.4
0.4
± 10
± 10
10
10
Straight (Natural) Binary
2s Complement
V min
V max
µA max
pF max
ISOURCE = 200 µA
ISINK = 0.8 mA
Unipolar Input Range
Bipolar Input Range
CONVERSION RATE
Conversion Time
2.78
3.25
Conversion + T/H Acquisition Time
3.0
3.5
µs max
µs max
19.5 CLKIN Cycles
21 CLKIN Cycles Throughput Rate
–2–
REV. A
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