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HI5960SOICEVAL1

14-Bit, 130MSPS, High Speed D/A Converter

Intersil 

HI5960

Electrical Specifications AVDD = DVDD = +5V, VREF = Internal 1.2V, IOUTFS = 20mA, TA = 25oC for All Typical Values (Continued)

PARAMETER

TEST CONDITIONS

MIN TYP MAX UNITS

+3V Power Supply

Spurious Free Dynamic Range,

SFDR to Nyquist (fCLK/2)

+3V Power Supply

Multitone Power Ratio

fCLK = 130MSPS, fOUT = 40.4MHz (Notes 4, 8)

-

48

-

dBc

fCLK = 130MSPS, fOUT = 10.1MHz (Notes 4, 8)

-

66

-

dBc

fCLK = 130MSPS, fOUT = 5.02MHz (Notes 4, 8)

-

74

-

dBc

fCLK = 100MSPS, fOUT = 40.4MHz (Notes 4, 8)

-

49

-

dBc

fCLK = 100MSPS, fOUT = 20.2MHz (Notes 4, 8)

-

59

-

dBc

fCLK = 100MSPS, fOUT = 5.04MHz (Notes 4, 8)

-

72

-

dBc

fCLK = 100MSPS, fOUT = 2.51MHz (Notes 4, 8)

-

77

-

dBc

fCLK = 50MSPS, fOUT = 20.2MHz (Notes 4, 8)

fCLK = 50MSPS, fOUT = 5.02MHz, T = 25oC (Notes 4, 8)

-

56

-

dBc

68

73

-

dBc

fCLK = 50MSPS, fOUT = 5.02MHz, T = Min to Max (Notes 4, 8)

66

-

-

dBc

fCLK = 50MSPS, fOUT = 2.51MHz (Notes 4, 8)

-

76

-

dBc

fCLK = 50MSPS, fOUT = 1.00MHz (Notes 4, 8)

-

79

-

dBc

fCLK = 25MSPS, fOUT = 1.0MHz (Notes 4, 8)

-

78

-

dBc

fCLK = 20MSPS, fOUT = 2.0MHz to 2.99MHz, 8 Tones at 110kHz

-

75

-

dBc

Spacing (Notes 4, 8)

fCLK = 100MSPS, fOUT = 10MHz to 14.95MHz, 8 Tones at 530kHz -

77

-

dBc

Spacing (Notes 4, 8)

VOLTAGE REFERENCE

Internal Reference Voltage, VFSADJ

Internal Reference Voltage Drift

Pin 18 Voltage with Internal Reference

1.13 1.2 1.28

V

-

±60

-

ppm/οΧ

Internal Reference Output Current

Sink/Source Capability

-

±50

-

µA

Reference Input Impedance

-

1

-

MΩ

Reference Input Multiplying Bandwidth (Note 8)

-

1.4

-

MHz

DIGITAL INPUTS D11-D0, CLK

Input Logic High Voltage with

5V Supply, VIH

Input Logic High Voltage with

3V Supply, VIH

Input Logic Low Voltage with

5V Supply, VIL

Input Logic Low Voltage with

3V Supply, VIL

Sleep Input Current, IIH

Input Logic Current, IIH

Input Logic Current, IIL

Digital Input Capacitance, CIN

TIMING CHARACTERISTICS

(Note 3)

(Note 3)

(Note 3)

(Note 3)

3.5

5

-

V

2.1

3

-

V

-

0

1.3

V

-

0

0.9

V

-25

-

+25

µA

-20

-

+20

µA

-10

-

+10

µA

-

5

-

pF

Data Setup Time, tSU

Data Hold Time, tHLD

Propagation Delay Time, tPD

CLK Pulse Width, tPW1, tPW2

See Figure 4 (Note 3)

See Figure 4 (Note 3)

See Figure 4

See Figure 4 (Note 3)

-

1.5

-

ns

-

1.2

-

ns

-

2.5

-

ns

4

-

-

ns

6

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