HI5741BIB-T Просмотр технического описания (PDF) - Intersil
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HI5741BIB-T Datasheet PDF : 13 Pages
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HI5741
Electrical Specifications AVEE, DVEE = -4.94V to -5.46V, VCC = +4.75 to +5.25V, VREF = Internal,
TA = +25°C (Continued)
PARAMETER
TEST CONDITIONS
HI5741BI
TA = -40°C TO +85°C
MIN TYP MAX
UNITS
Spurious Free Dynamic Range to Nyquist
(Note 4)
Multi-Tone Power Ratio
(MTPR)
REFERENCE/CONTROL AMPLIFIER
fCLK = 10 MSPS, fOUT = 1.023MHz, 5MHz Span
-
86
-
dBc
fCLK = 10 MSPS, fOUT = 2.02MHz, 5MHz Span
-
85
-
dBc
fCLK = 25 MSPS, fOUT = 2.02MHz, 12.5MHz Span
-
77
-
dBc
fCLK = 50 MSPS, fOUT = 5.055MHz, 25MHz Span
-
74
-
dBc
fCLK = 75 MSPS, fOUT = 7.52MHz, 37.5MHz Span
-
73
-
dBc
fCLK = 100 MSPS, fOUT = 10.1MHz, 50MHz Span
-
71
-
dBc
8 Tones, no Clipping, 110kHz Spacing, 220kHz spacing -
76
-
dBc
between tones 4 and 5, fCLK = 20 MSPS (Note 7)
Internal Reference Voltage, VREF
Internal Reference Voltage Drift
(Note 5)
(Note 4)
-1.27 -1.23 -1.17
V
-
50
-
µV/°C
Internal Reference Output Current Sink/Source
Capability
(Note 4)
-500
-
+50
µA
Internal Reference Load Regulation
Amplifier Input Impedance
IREF = 0 to IREF = -500µA
(Note 4)
-
100
-
µV
-
3
-
MΩ
Amplifier Large Signal Bandwidth
Amplifier Small Signal Bandwidth
Reference Input Impedance (CTL IN)
4.0VP-P Sine Wave Input, to Slew Rate Limited (Note 4) -
1
-
MHz
1.0VP-P Sine Wave Input, to -3dB Loss (Note 4)
-
5
-
MHz
(Note 4)
-
12
-
kΩ
Reference Input Multiplying Bandwidth (CTL IN) RL = 50Ω, 100mV Sine Wave, to -3dB Loss at IOUT
(Note 4)
-
75
-
MHz
DIGITAL INPUTS (D9-D0, CLK, INVERT)
Input Logic High Voltage, VIH
Input Logic Low Voltage, VIL
Input Logic Current, IIH
Input Logic Current, IIL
Digital Input Capacitance, CIN
TIMING CHARACTERISTICS
(Note 5)
(Note 5)
(Note 5)
(Note 5)
(Note 4)
2.0
-
-
V
-
-
0.8
V
-
-
400
µA
-
-
700
µA
-
3.0
-
pF
Data Setup Time, tSU
Data Hold Time, tHLD
Propagation Delay Time, tPD
CLK Pulse Width, tPW1, tPW2
POWER SUPPLY CHARACTERISTICS
See Figure 1 (Note 4)
See Figure 1 (Note 4)
See Figure 1 (Note 4)
See Figure 1 (Note 4)
3
2.0
-
ns
0.5 0.25
-
ns
-
4.5
-
ns
1.0 0.85
-
ns
IVEEA
IVEED
IVCCD
Power Dissipation
(Note 5)
(Note 5)
(Note 5)
(Note 5)
-
42
50
mA
-
75
95
mA
-
13
20
mA
-
650
-
mW
Power Supply Rejection Ratio
NOTES:
VCC ±5%, VEE ±5%
-
5
-
µA/V
2. Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.
3. Gain Error measured as the error in the ratio between the full scale output current and the current through RSET (typically 1.28mA). Ideally the
ratio should be 16.
4. Parameter guaranteed by design or characterization and not production tested.
5. All devices are 100% tested at +25°C.
6. Dynamic Range must be limited to a 1V swing within the compliance range.
7. In testing MTPR, tone frequencies ranged from 1.95MHz to 3.05MHz. The ratio is measured as the range from peak power to peak distortion in
the region of removed tones.
4
FN4071.12
September 20, 2006
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