TPU2735 Просмотр технического описания (PDF) - Micronas
Номер в каталоге
Компоненты Описание
производитель
TPU2735 Datasheet PDF : 37 Pages
| |||
TPU 2735
Contents
Page
Section
4
1.
5
2.
6
3.
6
3.1.
6
3.2.
6
3.2.1.
7
3.2.2.
8
3.3.
10
3.4.
11
3.5.
11
3.5.1.
11
3.5.2.
13
3.5.3.
13
3.5.4.
14
3.5.5.
15
4.
15
4.1.
15
4.2.
15
4.3.
15
4.3.1.
15
4.3.2.
15
4.4.
16
5.
17
6.
17
6.1.
18
6.2.
18
6.3.
18
6.4.
19
7.
19
7.1.
20
7.2.
20
7.3.
21
7.4.
21
7.5.
22
7.6.
23
7.7.
27
7.8.
28
8.
28
8.1.
28
8.2.
28
8.3.
28
8.4.
29
8.5.
29
8.6.
Title
Introduction
Functional Description
Specifications
Outline Dimensions
Pin Connections
40-Pin DIL Plastic Package
44-Pin PLCC Package
Pin Descriptions
Pin Circuits
Electrical Characteristics
Absolute Maximum Ratings
Recommended Operating Conditions
Characteristics of the Digital Section
Characteristics, RGB Interface
Characteristics of the External RAM
Various Operation Modes of the TPU 2735
The Menu Mode
Teletext Display without Interlaced Lines
The Effect of Errors in the Transmission of Teletext Data
Errors in the Hamming-Code Protected Data
Errors in Data with Parity Check
Multipage Conflict Situation
RAM Organization
Controlling the TPU 2735 with the CCU 2030, CCU 2050 or CCU 2070
The Address Commands
The Data Transfer Command
The Status Test Command
The IM Bus Hardware Test/Configuration Register
The Control Registers of Register Chain 2
The Page Request Registers, R-PRx
The Page Selection Register, R-PS
The Subcode Register, R-SC
The Display Selection Register, R-DS
The Data Acquisition Control Register, R-DAC
The Status Indicator Register, R-SI
The Display Control Registers, R-DC1 to R-DC6
The Memory Control Register, R-MC
The Control Registers of Register Chain 1
The Page Identification Register, R-PI
The Control Bit Register 1, R-CB1
The Control Bit Register 2, R-CB2
The Control Bit Register 3, R-CB3
The Row Flag Register, R-RFx
The Timing of the Register Chains
2
Share Link: 