NE56611-27 Просмотр технического описания (PDF) - Philips Electronics

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NE56611-27

System reset

Philips Electronics 

Philips Semiconductors

System reset

Product data

NE56610/11/12-XX

APPLICATION INFORMATION

When the manual reset is not needed, the M/R, manual reset pin is

connected to ground as shown in Figure 18. A capacitor connected

from VCC to ground is recommended when the VCC supply

impedance is appreciably high. This may be the situation with a poor

quality or aged battery.

TO VCC

TO CPU

RPU

RESET PIN

5

VCC

4

VOUT

M/R SUB GND

1

2

3

SL01383

Figure 18. Typical hard reset circuit

Figure 19 shows a circuit with a manual reset switch. When the

manual switch is closed, VOUT reset is a low voltage state.

Conversely, when it is opened, VOUT reset is a HIGH voltage state.

As a precaution, a clamp diode is placed from the M/R pin to ground

to ensure that the pin does not go below –0.3 V.

TO VCC

MANUAL

SWITCH

RPU

5

VCC

4

VOUT

TO CPU

RESET PIN

CLAMP

DIODE

M/R SUB GND

1

2

3

RPD

Figure 19. Manual Reset circuit

SL01384

When a manual reset is used, it is suggested a resistor (RPU) be

connected from the M/R pin to ground so as to provide a pull-down

ground reference for the M/R pin when not in use. This will reduce

the possibility of an induced erroneous voltage being imposed on

the M/R pin. This can be a solution in noisy applications where the

manual reset line is of considerable length and subject to picking up

induced voltages. The M/R pin can be pulled to a HIGH voltage

state whenever a manual reset is imposed. The only disadvantage

to this is a small amount of additional current flow through the

pull-down ground reference resistor when the M/R pin is pulled to a

HIGH state.

TEST CIRCUITS

A2

A1

RPU

5

4

V1

VCC

VOUT

VCC

M/R SUB GND

V2

10 µF/10 V

1

2

3

VM/R

A = DC AMPMETER

V = DC VOLTMETER

Figure 20. Test circuit 1

SL01385

2003 Oct 31

INPUT

PULSE

5

VCC

4

VOUT

RPU

10 µF/10 V

M/R SUB GND

1

2

3

5.0 V

CL

100 pF

CRT

CRT = OSCILLOSCOPE

INPUT PULSE

VS(typ) + 0.4 V

VS(typ) – 0.4 V

0V

Figure 21. Test circuit 2

SL01386

10

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