GM76C8128C-E Просмотр технического описания (PDF) - LG

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GM76C8128C-E

131,072 words x 8 bit CMOS static RAM, low power, 85ns

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GM76C8128CL/CLL

Data Retention Characteristics

Symbol

Parameter

Min Typ Max Unit

VCCR Data Retention Supply Voltage

2.0 - 5.5 V

ICCR

Data Retention GM76C8128C

L - Version

-

LL - Version -

1 50

0.5 15*

Current

VCC=3.0V

GM76C8128C-E

L - Version

-

uA

-

50

GM76C8128C-I

LL - Version -

- 25*

tCDR Chip Select to Data Retention Time

0

-

-

ns

tR

Operation Recovery Time

tRC** -

-

ns

* 3uA max at TA = 0 ~ 40C

** tRC = Read Cycle

* Low VCC Data Retention Mode: (1) /CS1 Controlled

VCC

4.5V

tCDR

Data Retention Mode

tR

2.2V

VCCR1

/CS1>= VCCR - 0.2V

/CS1

0V

* Low VCC Data Retention Mode: (2) CS2 Controlled

VCC

4.5V

tCDR Data Retention Mode tR

CS2

VCCR2

0.4V

0V

CS2 <= 0.2V

Notes: In Data Retention Mode, CS2 controls the Address, /WE, /CS1, /OE and DIN buffer. If CS2 controls

data retention mode, VIN for these inputs can be in the high impedance state. If /CS1 controls the

data retention mode, CS2 must satisfy either CS2 >_VCCR - 0.2V or CS2<=0.2V. The other input levels

(Address, /WE, /OE, I/O) can be in the high impedance state.

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