W83977ATF Просмотр технического описания (PDF) - Winbond
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W83977ATF Datasheet PDF : 212 Pages
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W83977ATF
4.8.5 Set6.Reg4 - High Speed Infrared Beginning Flag Number (HIR_FNU)................................................77
4.9 SET7 - REMOTE CONTROL AND IR MODULE SELECTION REGISTERS................................................................. 78
4.9.1 Set7.Reg0 - Remote Infrared Receiver Control (RIR_RXC)....................................................................78
4.9.2 Set7.Reg1 - Remote Infrared Transmitter Control (RIR_TXC) ...............................................................80
4.9.3 Set7.Reg2 - Remote Infrared Config Register (RIR_CFG)......................................................................81
4.9.4 Set7.Reg3 - Sets Select Register (SSR).....................................................................................................82
4.9.5 Set7.Reg4 - Infrared Module (Front End) Select 1 (IRM_SL1)...............................................................82
4.9.6 Set7.Reg5 - Infrared Module (Front End) Select 2 (IRM_SL2)...............................................................83
4.9.7 Set7.Reg6 - Infrared Module (Front End) Select 3 (IRM_SL3)...............................................................83
4.9.8 Set7.Reg7 - Infrared Module Control Register (IRM_CR)......................................................................84
5.0 PARALLEL PORT .....................................................................................................................................85
5.1 PRINTER INTERFACE LOGIC .............................................................................................................................85
5.2 ENHANCED PARALLEL PORT (EPP) .................................................................................................................86
5.2.1 Data Swapper ..........................................................................................................................................87
5.2.2 Printer Status Buffer................................................................................................................................87
5.2.3 Printer Control Latch and Printer Control Swapper ..............................................................................88
5.2.4 EPP Address Port....................................................................................................................................88
5.2.5 EPP Data Port 0-3 ..................................................................................................................................89
5.2.6 Bit Map of Parallel Port and EPP Registers...........................................................................................89
5.2.7 EPP Pin Descriptions..............................................................................................................................90
5.2.8 EPP Operation ........................................................................................................................................90
5.3 EXTENDED CAPABILITIES PARALLEL (ECP) PORT .......................................................................................... 91
5.3.1 ECP Register and Mode Definitions........................................................................................................91
5.3.2 Data and ecpAFifo Port ..........................................................................................................................92
5.3.3 Device Status Register (DSR) ..................................................................................................................92
5.3.4 Device Control Register (DCR)...............................................................................................................93
5.3.5 cFifo (Parallel Port Data FIFO) Mode = 010 ........................................................................................94
5.3.6 ecpDFifo (ECP Data FIFO) Mode = 011 ...............................................................................................94
5.3.7 tFifo (Test FIFO Mode) Mode = 110 ......................................................................................................94
5.3.8 cnfgA (Configuration Register A) Mode = 111 .......................................................................................94
5.3.9 cnfgB (Configuration Register B) Mode = 111 .......................................................................................94
5.3.10 ecr (Extended Control Register) Mode = all .........................................................................................95
5.3.11 Bit Map of ECP Port Registers..............................................................................................................97
5.3.12 ECP Pin Descriptions............................................................................................................................98
5.3.13 ECP Operation ......................................................................................................................................99
5.3.14 FIFO Operation.....................................................................................................................................99
5.3.15 DMA Transfers ....................................................................................................................................100
5.3.16 Programmed I/O (NON-DMA) Mode..................................................................................................100
5.4 EXTENSION FDD MODE (EXTFDD)............................................................................................................. 100
5.5 EXTENSION 2FDD MODE (EXT2FDD).........................................................................................................100
6.0 KEYBOARD CONTROLLER.................................................................................................................. 101
6.1 OUTPUT BUFFER............................................................................................................................................ 101
6.2 INPUT BUFFER ...............................................................................................................................................101
6.3 STATUS REGISTER .........................................................................................................................................102
6.4 COMMANDS................................................................................................................................................... 102
6.5 HARDWARE GATEA20/KEYBOARD RESET CONTROL LOGIC .......................................................104
6.5.1 KB Control Register (Logic Device 5, CR-F0)......................................................................................104
6.5.2 Port 92 Control Register (Default Value = 0x24) .................................................................................105
7.0 GENERAL PURPOSE I/O ........................................................................................................................ 106
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Publication Release Date: Apr 2001
Revision 0.53
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