XWM8722EDS Просмотр технического описания (PDF) - Wolfson Microelectronics plc

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XWM8722EDS

Stereo DAC with Integrated Tone Generator and Line/Variable Level Outputs

Wolfson Microelectronics plc 

Advanced Information

WM8722

SAMPLING RATE

(LRCIN)

SYSTEM CLOCK FREQUENCY (MHZ)

256fs

384fs

32kHz

8.192

12.288

44.1kHz

48kHz

11.2896

12.288

16.9340

18.432

96kHz

24.576

36.864

Table 1 System Clock Frequencies versus Sampling Rate

AUDIO DATA INTERFACE

The serial data interface to WM8722 is fully compatible with both normal (MSB first, right-justified) or

I2S interfaces. Data may be packed (number of serial BLCKS per LRCIN period is exactly 2 times the

number of data bits, i.e. normally 32 in 16 bit mode) or unpacked (more than 32 BCLKs per LRCIN

period.

The WM8722 will automatically detect 16-bit packed data being sent to the device in normal mode,

and accept the data in this input format accordingly.

I2S MODE

0

1

Table 2. Serial Interface Formats

DESCRIPTION

Normal format (MSB-first, right justified)

I2S format (Philips serial data protocol )

1/fs

LRCIN

BCKIN

LEFT CHANNEL

DIN

123

n-2 n-1 n

MSB

LSB

Figure 5. Normal Data Input Timing

1/fs

RIGHT CHANNEL

123

MSB

n-2 n-1 n

LSB

LRCIN

LEFT CHANNEL

BCKIN

DIN

123

MSB

Figure 6. I2S Data Input Timing

n-2 n-1 n

LSB

RIGHT CHANNEL

123

MSB

n-2 n-1 n

LSB

WOLFSON MICROELECTRONICS LTD

AI Rev 1.5 May 2000

11

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