LRI512 Просмотр технического описания (PDF) - STMicroelectronics

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LRI512

Memory TAG IC 512 bit High Endurance EEPROM 13.56MHz, ISO 15693 Standard Compliant with E.A.S.

STMicroelectronics 

LRI512

Bit Coding Using Two Subcarriers

High Data Rate. A logic 0 starts with 8 pulses of

423.75 kHz (fC/32) followed by 9 pulses of

484.28 kHz (fC/28) as shown in Figure 16.

Figure 16. Logic 0, High Data Rate

Low Data Rate. A logic 0 starts with 32 pulses of

423.75 kHz (fC/32) followed by 36 pulses of

484.28 kHz (fC/28) as shown in Figure 18.

Figure 18. Logic 0, Low Data Rate

37.46 µs

AI06670

A logic 1 starts with 9 pulses of 484.28 kHz (fC/28)

followed by 8 pulses of 423.75 kHz (fC/32) as

shown in Figure 17.

Figure 17. Logic 1, High Data Rate

149.86 µs ± 0.3 µs

AI06668

A logic 1 starts with 36 pulses of 484.28 kHz (fC/

28) followed by 32 pulses of 423.75 kHz (fC/32) as

shown in Figure 19.

Figure 19. Logic 1, Low Data Rate

37.46 µs

AI06669

149.86 µs ± 0.3 µs

AI06667

10/54

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