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VSC9111 Просмотр технического описания (PDF) - Vitesse Semiconductor

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Target Specification
VSC9111
VITESSE
SEMICONDUCTOR CORPORATION
SONET/SDH 2.5Gb/s
Transport Terminating Transceiver
Pin
Name
I/O
TXRST
Parallel Drop
Transmit Reset
O
RXDAT_
[A..D][1..4][1..
0]
Parallel Drop Receive
Data
O
RXCLK_
[A..D]
Parallel Drop Receive
Clock
O
RXFP_
[A..D]
Parallel Drop Receive
Frame Pulse
O
Freq
Type
TTL
TTL
TTL
TTL
Description
STS-3/12/48 Transmit Interface Reset.
Indicates synchronisation errors on the STS-3/12/48 transmit
data streams. The signal is used for resynchronizing the STS-
3/12 transmit flows. Synchronization status is based on the
transmit frame pulses (TXFP_xN), which must be aligned
within +/- 2 clock cycles. TXRST changes on the rising edge
of TXCLKOUT_x.
x = [A,B,C,D], N = [1,2,3,4].
STS-3/12/48 Receive Data.
In STS-3 mode, RXDAT_A1[1..0] carries STS-3 #1,
RXDAT_A2[1..0] carries STS-3 #2, …, RXDAT_D3[1..0]
carries STS-3 #15 and RXDAT_D4[1..0] carries STS-3 #16,
i.e. each STS-3 interface is 2 bits wide. RXDAT_xN[1] is the
most significant bit.
In STS-12 mode, RXDAT_A[1..4][1..0] carries STS-12 #1,
RXDAT_B[1..4][1..0] carries STS-12 #2, …, and
RXDAT_D[1..4][1..0] carries STS-12 #4, i.e. each STS-12
interface is 8 bits wide. RXDAT_x1[1] is the most significant
bit, RXDAT_x1[0] the second most significant bit, …, and
RXDAT_x4[0] the least significant bit.
In STS-48 mode, RXDAT_[A..D][1..4][1..0] carries the STS-
48 data stream, i.e. RXDAT_[A..D][1..4][1..0] is interpreted
as one 32 bit bus. RXDAT_A1[1] is the most significant bit,
…, and RXDAT_D4[0] the least significant bit.
RXDAT_xN changes on the falling edge of RXCLKA-D.
x = [A,B,C,D], N = [1,2,3,4]
STS-3/12/48 Receive Clock.
Clock reference for the STS-3/12/48 receive flow carried in
RXDAT_xN. The clock frequency is nominally 77.76MHz
equivalent to STS-3/12/48 operation.
x = [A,B,C,D], N = [1,2,3,4].
STS-3/12/48 Receive Frame Pulse.
Frame reference for the STS-3/12/48 receive flows carried in
RXDAT_xN. The frame pulse is a one clock cycle pulse
coincident with the first payload byte (i.e. first byte following
last Z0) of the STS-3/12/48 frames (optionally the first
overhead byte, A1). RXFP_[A..D] changes on the falling
edge of RXCLK_[A..D].
In STS-3 mode, the frame pulse is only asserted during the
first cycle of the first payload byte (optionally the first
overhead byte).
x = [A,B,C,D], N = [1,2,3,4].
G52199-0, Rev. 1.2
3/8/99
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
Page 7

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