Philips Semiconductors
SDH/SONET data and clock recovery unit
STM1/4 OC3/12
Objective specification
TZA3004HL
handbook, full pagewidth
BAND GAP
REFERENCE
100 nF VEE
PC
2Ω
β > 100
POWER
CONTROL
1 kΩ
2Ω
1
kΩ
3.3
nF
1 µF
1 µH
−4.5 V
MGK141
Fig.4 Schematic diagram of TZA3004HL power control loop.
Output amplitude reference (AREF)
The voltage swing at the CML compatible output stages
DOUT, DOUTQ; COUT, COUTQ; DLOOP, DLOOPQ and
CLOOP, CLOOPQ can be controlled by adjusting the
voltage at the AREF pin. An internal voltage divider of
500 Ω and16 kΩ between GND and VEE initially fixes this
level.
In most applications the outputs will be DC coupled to a
load, which can be as low as 50 Ω (±0.20%). The output
level regulation circuit will maintain a 200 mV
peak-to-peak single-ended swing across this load.
The voltage at AREF is half the single-ended peak-to-peak
value of the output signal (or −100 mV in this case).
No adjustments are necessary with DC coupling.
If the outputs are AC coupled, however, the voltage at
AREF is half the single-ended peak-to-peak value of the
output signal multiplied by a factor R-----L--R--+---L--R-----o
where R L is the external load and Ro is the output
impedance of the TZA3004HL.
To maintain a 200 mV peak-to-peak single-ended swing
across a 50 Ω AC coupled load, the voltage at AREF must
be –----1---0---0------m-----V-----×-----5-(--0-5---0--Ω----Ω------+-----1---0---0------Ω----)-- = –300 mV .
This can be achieved by connecting a 7.3 kΩ resistor
between AREF and VEE.
The formulae for calculating the required voltage at AREF
and the external resistance needed between AREF and
VEE when the outputs are AC coupled are:
VAREF = –R-----L--R--+---L--R-----o × 12-- Vswing
(1)
and:
R
1
×
V----V-A---ER---E-E---F-
–
1
RAREF
=
----------------------------------------------------------------
1
–
RR-----12--
×
V----V-A---ER---E-E---F-
–
1
(2)
where R1 = 500 Ω, R2 = 16 kΩ and VEE = −3.3 V. RAREF
is connected between AREF and VEE.
1998 Feb 09
7