L6000 Просмотр технического описания (PDF) - STMicroelectronics

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L6000

SINGLE CHIP READ & WRITE CHANNEL

STMicroelectronics 

L6000

PULSE DETECTOR AND SERVO DEMODULATOR CHARACTERISTICS (continued)

Symbol

Parameter

Test Condition

Min.

Data Comparator Section

(The input signals are AC coupled to DATA PATH and DATA PATH)

DATA PATH/ Signal Range

–

DATA PATH

Differential Input resistance

8

Differential Input capacitance

–

Comparator Offset Voltage

(*)

–

Threshold Voltage Hysteresis (*)

–

Kth

Threshold Voltage Gain

0.3 ≤ ( LEVEL-LEVEL REF V) ≤ Kth-9%

0.75, Kth = VTHDAC*0.651/127,

38 < VTHDAC < 125,

Vthresh = KTH*(LEVEL-LEVEL

REF V), also, %hyst =

VTHDAC*97.6%/127

Minimum Threshold Voltage

LEVEL-LEVEL REF V ≤ 0.1V,

–

Vthmin = VTHDAC*0.099/127

(*)

Clocking Section

(The input signals are AC coupled to CLOCK PATH and CLOCK PATH)

CLOCK PATH-CLOCK PATH

–

Signal Range

Comparator Offset Voltage

(*)

–

Differential Input Resistance

8

Differential Input Capacitance

–

Pulse Paring

Vs = 1Vpp, F = 4MHz

–

Prpagation Delay to READ

Vs = 20mVpp sq. wave

4

DATA I/O

Servo Section

SERVO REF V Voltage Range 2.15V ≤ SERVO REF V ≤ 2.75V 2.15

SERVO REF V Input Bias

–1

Current

Voltage Gain, SERVO REF V

to POSITION OUT

|HOLD CAP A-HOLD CAP B| ≤ 0.98

0.4V

POSITION OUT Pin Offset

Voltage

HOLD CAP A-HOLD CAP B =

–

0V, SERVO REF V = 2.50V

POSITI ON OUT Pin High

HOLD CAP A-HOLD CAP B = Vcc

+1.8V

PULSE

Level Output Voltage

SERVO REF V = 2.50V,

Isource = 0.5mA

DET-

1.5

POSITI ON OUT Pin Low

HOLD CAP A-HOLD CAP B = GND

-1.8V

PULSE

Level Output Voltage

SERVO REF V = 2.50V Isink = DET

0.5mA

+0.3

RO

POSITI ON OUT Pin Output

VNG+1.5V ≤ POSITION

–

Resistance

OUT ≤ VPG-1.5V

POSITION OUT GAIN

(POSITION OUT-SERVO REF

V)/Vpp

HOLD CAP A/B Charge Current Absolute Value

4

Typ. Max.

1

1.5

–

–

–

20Kth

Kth

14

5

±4

–

Kth+9%

Vthmin –

–

1.5

–

±4

–

14

–

5

–

0.5

12

20

2.50 2.75

0.2

1

1.0 1.02

0

±12

–

Vcc

PULSE

DET-

0.3

–

GND

PULSE

DET

+1.5

–

50

1.8

–

–

Unit

Vpp

KΩ

pF

mV

%

V/V

V

Vpp

mV

KΩ

pF

ns

ns

V

µA

v/v

mV

V

V

Ω

V/Vpp

(2)

mA

(*) Guaranted by design.

(2) Test limits under evaluation.

10/24

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