DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

MAX4573EWI Просмотр технического описания (PDF) - Maxim Integrated

Номер в каталоге
Компоненты Описание
производитель
MAX4573EWI Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Serially Controlled, Clickless
Audio/Video Switches
I/O INTERFACE CHARACTERISTICS
(V+ = +2.7V to +5.25V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
DIGITAL INPUTS (SCLK, DIN, CS, SCL, SDA, A0, A1)
Input Low Voltage
V+ = 5V
VIL
V+ = 3V
Input High Voltage
V+ = 5V
VIH
V+ = 3V
Input Hysteresis
VHYST
Input Leakage Current
ILEAK Digital inputs = 0 or V+
Input Capacitance
CIN
DIGITAL OUTPUTS (DOUT, SDA)
Output Low Voltage
VOL
ISINK = 6mA
DOUT Output High Voltage
VOH ISOURCE = 0.5mA
MIN TYP
3
2
0.2
-1
0.01
5
V+
- 0.5
2-WIRE INTERFACE TIMING (Figure 3)
SCL Clock Frequency
fSCL
DC
Bus Free Time between Stop
and Start Condition
tBUF
1.3
START Condition Hold Time
STOP Condition Setup Time
Data Hold Time
Data Setup Time
Clock Low Period
Clock High Period
SCL/SDA Rise Time
tHD:STA
tSU:STO
tHD:DAT
tSU:DAT
tLOW
tHIGH
tR
(Note 11)
0.6
0.6
0
100
1.3
0.6
20 +
0.1Cb
SCL/SDA Fall Time
tF
(Note 11)
20 +
0.1Cb
3-WIRE TIMING (Figure 5)
Operating Frequency
fOP
DC
DIN to SCLK Setup
tDS
100
DIN to SCLK Hold
tDH
SCLK Fall to Output Data Valid
tDO
CLOAD = 50pF
20
CS to SCLK Rise Setup
tCSS
100
CS to SCLK Rise Hold
tCSH
0
CS High Pulse Width
tCSW
200
SCLK Pulse Width Low
tCL
200
SCLK Pulse Width High
tCH
200
Rise Time (SCLK, DIN, CS)
tR
Fall Time (SCLK, DIN, CS)
tF
MAX UNITS
0.8
V
0.6
V
V
1
µA
pF
0.4
V
V
400 kHz
µs
µs
µs
0.9
µs
ns
µs
µs
300
ns
300
ns
2.1 MHz
ns
0
ns
200
ns
ns
ns
ns
ns
ns
2
µs
2
µs
_______________________________________________________________________________________ 5

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]