CY7C1018CV33-12VXI(2006) Просмотр технического описания (PDF) - Cypress Semiconductor

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производитель

CY7C1018CV33-12VXI
(Rev.:2006)

128K x 8 Static RAM

Cypress Semiconductor 

Switching Waveforms (continued)

Write Cycle No. 2 (WE Controlled, OE HIGH During Write)[14, 15]

CY7C1018CV33

ADDRESS

CE

WE

tWC

tSCE

tAW

tSA

tPWE

OE

DATA I/O

NOTE 16

tHZOE

tSD

DATAIN VALID

Write Cycle No. 3 (WE Controlled, OE LOW)[10, 15]

ADDRESS

CE

tWC

tSCE

tSA

WE

DATA I/O

NOTE 16

tHZWE

tAW

tPWE

tSD

DATA VALID

Truth Table

CE

OE WE

I/O0–I/O7

H

X

X High-Z

Power-down

Mode

L

L

H Data Out

Read

L

X

L Data In

Write

L

H

H High-Z

Selected, Outputs Disabled

Note:

16. During this period the I/Os are in the output state and input signals should not be applied.

tHA

tHD

tHA

tHD

tLZWE

Power

Standby (ISB)

Active (ICC)

Active (ICC)

Active (ICC)

Document #: 38-05131 Rev. *D

Page 5 of 7

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