MT90710 Просмотр технического описания (PDF) - Mitel Networks
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MT90710 Datasheet PDF : 12 Pages
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Preliminary Information
MT90710
Pin Description
Pin #
10
11
12
13
14
15,16,
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
Name
STo5
VDD
VSS
C4o
C4REFo
NC
Description
Serial, 32 Channel, 2.048 Mb/s Link 5 (Output Type 3). Output is active only when
the receiver detects the synchronization pattern on RxDATA input stream; output is high
impedance during loss of synchronization.
Positive Power Supply. Nominally 5 volts.
Power Supply Ground. Nominally 0 volts.
4.096 MHz Clock (Output Type 3). Used by the transmit PLL. This clock is the input
C40i (40.96MHz, see pin 18) master clock divided by 10 (inverted) and is fed back to
the external PLL circuit as a reference.
4.096 MHz Reference Clock (Output Type 3). Used by transmit PLL. When in control-
ler mode this clock is derived from the system C4b (4.096 MHz) clock input (see pin
57). When in peripheral mode this clock is extracted from the receive data on the fiber
port.
No Internal Connection.
C40i
STi1
STi2
VSS
VDD
STi3
STi4
STi5
STi6A
STi6B
STi7
E20i
NC
VSS
NC
VDD
NC
RxDATA
RLED
FBOE
Transmit 40.96 MHz Clock (Input Type 2). Derived from the transmit PLL. This is the
master clock used by the device.
Serial, 32 Channel, 2.048 Mb/s Link 1 (Input Type 1).
Serial, 32 Channel, 2.048 Mb/s Link 2 (Input Type 1).
Power Supply Ground. Nominally 0 volts.
Positive Power Supply. Nominally 5 volts.
Serial, 32 Channel, 2.048 Mb/s Link 3 (Input Type 1).
Serial, 32 Channel, 2.048 Mb/s Link 4 (Input Type 1).
Serial, 32 Channel, 2.048 Mb/s Link 5 (Input Type 1).
Serial, 32 Channel, 2.048 Mb/s Link 6A (Input Type 1).
Serial, 32 Channel, 2.048 Mb/s Link 6B (Input Type 1).
Serial, 32 Channel, 2.048 Mb/s Link 7 (Input Type 1). Only channels 9 - 31 are avail-
able for user data transfer (1.472 Mb/s). Data input on channels 0 - 8 (0.576 Mb/s) is
ignored by the device. This bandwidth is reserved for fiber overhead information.
Receiver 20.96 MHz Clock (Input Type 2). Extracted clock from the receive data
stream. Divided internally by 5 and phase corrected to frame synch pattern to produce
internal 2.048 MHz data clock for parsing the receive STi streams.
No Internal Connection.
Power Supply Ground. Nominally 0 volts.
No Internal Connection.
Positive Power Supply. Nominally 5 volts.
No Internal Connection.
Receive 4B/5B, NRZI Encoded Serial Data (Input Type 1).
"Remote Sync" LED Driver (Open Collector, Output Type 3). Drives the "Remote
Sync" LED on/off at approximately a 4 Hz rate when the remote interface is not syn-
chronized. Active only when the local interface is synchronized.
Frame Buffer Ram Enable (Output Type 2). Generates a low going strobe during
valid RAM read access.
5-5
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