CDP1823C Просмотр технического описания (PDF) - Intersil

Номер в каталоге

Компоненты Описание

производитель

CDP1823C

128-Word x 8-Bit LSI Static RAM

Intersil 

CDP1823, CDP1823C

Data Retention Specifications At TA = -40 to +85oC, see Figure 3

TEST

CONDITIONS

CDP1823

LIMITS

CDP1823C

PARAMETER

VDR

(V)

VDD

(NOTE 1)

(NOTE 1)

(V)

MIN

TYP MAX MIN

TYP

MAX UNITS

Minimum Data Retention Voltage, VDR

-

Data Retention Quiescent Current, IDD

2

Chip Deselect to Data Retention Time

-

-

-

1.5

2

-

1.5

2

V

-

-

30

100

-

30

100

µA

5

600

-

-

600

-

-

ns

tCDR

-

Recovery to Normal Operation

-

Time

tRC

-

10

300

-

5

600

-

10

300

-

-

-

-

-

600

-

-

-

-

-

ns

-

ns

-

ns

VDD to VDR Rise and Fall Time tR, tF

2

NOTE:

Typical values are for TA = 25oC and nominal VDD.

5

1

-

-

1

-

-

µs

VDD

tCDR

CS1

VIH

VIL

DATA RETENTION

MODE

0.95 VDD

tF

VDR

0.95 VDD

tR

tRC

VIH

VIL

FIGURE 3. LOW VDD DATA RETENTION TIMING WAVEFORMS

MA0

MA1

MA2

MA3

BUFFER

AND

DECODER

16 x 8 x 8

STORAGE

ARRAY

MA4

MA5

MA6

BUFFER

DECODER

MRD

MWR

CS1

CS2

CS3

CS4

CS5

CONTROL

BUS 0-7

FIGURE 4. FUNCTIONAL DIAGRAM

6-29

Share Link: