UT1750AR12WCC Просмотр технического описания (PDF) - Aeroflex UTMC
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UT1750AR12WCC Datasheet PDF : 56 Pages
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Must have BGT active here
for no wait states
1
OSCIN
STATE1
BRQ
BGT
BGACK
t38c
t38e
DTACK
BUSY
AS
DS
R/WR
Must have DTACK active here
for no wait states
2
t38a
t38d
t38f
t38b
t38g
t38k
t38l
t38j
t38i
M/IO
t38h
OP/IN
OPERAND
ADDRESS
OPERAND
DATA
ADDRESS
VALID
DATA
VALID
SYMBOL
PARAMETER
t38a*
t38b*
t38c*
t38d*
t38e
t38f
t38g*
t38h
t38i
t38j
t38k
t38l
OSCIN low to STATE1 high
OSCIN low to STATE1 low
OSCIN high to BRQ low
OSCIN low to BRQ high
BGT setup time
BGT hold time
OSCIN low to BGACK active
OSCIN low to BGACK high Z
DTACK setup time
DTACK hold time
BUSY setup time
BUSY hold time
Notes:
*Guaranteed by test.
1. BGT must be active and BUSY high at this clock edge or wait states will occur.
2. To avoid wait states, DTACK must be active here.
12 MHz
MIN MAX
0 42
0 39
0 54
0 58
15 --
0
--
0 53
-- 55
10 --
0
--
15 --
10 --
16 MHz
MIN MAX
UNITS
0 33 ns
0 33 ns
0 41 ns
0 44 ns
15 -- ns
0
-- ns
0 42 ns
-- 41 ns
10 -- ns
0
-- ns
10 -- ns
10 -- ns
Figure 38. DMA No Wait State
47
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