XE1212C Просмотр технического описания (PDF) - Xecom

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XE1212C

1200bps Modem Module with Parallel Host Interface

Xecom 

Programmable Baud Rate Generator

The XE1212C Baud Rate Generator can be programmed for one of four Baud rates. The desired speed is selected

by writing into the Divisor Latch (DLM) MSB and LSB registers.

(HEX CODE)

DLM

DLS

00

30

00

60

00

C0

01

80

Decimal

DIVISOR

48

96

192

384

BAUD RATE

2400

1200

600

300

Modem Control Register

This 8-bit register controls the interface with the Modem Processor as shown in the block diagram. The contents of

the Modem Control Register are described below.

Bit 0: This bit controls Data Terminal Ready (DTR) signal.

Bit 1: This bit controls the Request to Send (RTS) signal.

Bit 2: Output 1; Tied to RI during Local Loopback

Bit 3: Output 2; When this bit is a 0, INT (pin 13) is in the high-Z state.

Bit 4:

Selects Local Loopback Operation: Data presented to the Transmit holding Register is lopped

back to the Receiver Buffer Register. The modem control bits CTS, DSR, RI and DCD are

internally connected to the modem control outputs; RTS, DTR, Output 1, and Output 2.

Bit 5-7: These bits are permanently set to logic 0.

Modem Status Register

This register shows the current state of the control lines from the ModemProcessor to the CPU. It also indicates if

changes have occurred in these control lines. Bits 0-3 are set to a logic 1 whenever a control input from the

ModemProcessor changes state. These bits are reset to logic 0 whenever the CPU reads the Modem Status

Register. The contents of the Modem Status Register are described below.

Bits 0: This bit indicates that CTS has changed since the Modem Status Register was last read.

Bits 1: This bit indicates that DSR has changed since the Modem Status Register was last read.

Bit 2:

This bit is the Trailing Edge of Ring Indicator detector. Bit 2 indicates that RI (pin 4) has changed

from an On (logic 1) to an Off (logic 0) condition.

Bit 3:

This bit is the Delta Received Line Signal Detector Indicator. Bit 3 indicates that the carrier

detector has changed state.

Bit 4: This bit displays the status of Clear to Send.

Bit 5: This bit displays the status of Data Set Ready

Bit 6: This bit displays the complement of RI (pin 4).

Bit 7: This bit displays the status of DCD, Received Line Signal Detect.

Note 1: Whenever bit 2 or 3 is set to logic 1, a Modem Status Interrupt is generated.

XECOM

(8)

XE1212C

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