ACS402-5SB4(1999) Просмотр технического описания (PDF) - STMicroelectronics
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ACS402-5SB4 Datasheet PDF : 6 Pages
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ACS402-5SB4
Fig 5: Relative variation of gate trigger current
versus junction temperature
IGT[Tj]/IGT[Tj=25°C]
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0.00
0
Tj(°C)
25
50
75
100
125
Fig 6: Relative variation of holding & latching
currents versus junction temperature
IH[Tj]/IH[Tj=25°C] & IL[Tj]/IL[Tj=25°C]
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
Tj(°C)
0.0
0
25
50
75
100
125
Fig 7: On state characteristics @Tj max
VTO = 0.90 V & RT = 0.3 Ω (maximum values)
Pon = VTO . 2. 2 . I T (RMS ) Π + RT x I T (RMS ) 2
IOUT (A)
5
2
1
0.8
0.6
0.5
0.4
0.3
0.2
0.1
0.07
VTM (V)
0.05
0.5
0.75
1
1.25
1.5
1.75
2
Fig 8: Maximum total RMS current versus ambient
temperature on an inductive load (PF>0.1) and a
low repetitive rate (F<1Hz)
0.7
0.6
Total
0.5
Maximum
RMS current 0.4
(A)
0.3
0.2
0.1
0
0
20 40
60 80 100 120
Ambient Temperature (°C)
Fig 9: Relative variation of thermal impedance
junction to ambient versus pulse duration (epoxy
printed circuit board FR4, 35µm copper layout
thickness).
Zth(j-a)/Rth(j-a)
1E+0
1E-1
1 switch
1E-2
4 switches
1E-3
1E-4
1E-3
1E-2
tp (s)
1E-1 1E+0
1E+1
1E+2 5E+2
5/6
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