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STLVD111(2002) Просмотр технического описания (PDF) - STMicroelectronics

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STLVD111 Datasheet PDF : 12 Pages
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STLVD111
SPECIFICATION OF CONTROL REGISTER
The STLVD111 is provided with a 11 bit shift register with a Serial In and a Control Register. The purpose
is to enable or power of each output clock channel and to select the clock input. The STLVD111 provides
two working modality:
PROGRAMMED MODE (EN=1)
The shift register have a serial input to load the working configuration. Once the configuration is loaded
with 11 clock pulse, another clock pulse load the configuration into the control register. The first bit on the
serial input line enables the outputs Q9 and Q9, the second bit enables the outputs Q8 and Q8 and so on.
The last bit is the clock selection bit. To restart the configuration of the shift register a reset of the state
machine must be done with a clock pulse on CK and the EN set to Low. The control register shift register
can be configured on time after each reset.
STANDARD MODE (EN=0)
In Standard Mode the STLVD111 isn’t programmable, all the clock outputs are enabled. The LVDS clock
input is selected from Clock 0 or Clock 1 with the SI pin as shown in the Truth Table below.
TRUTH TABLE OF STATE MACHINE INPUTS
EN
SI
CK
OUTPUT
L
L
X
All Output Enabled, Clock 0 selected, Control Register disabled
L
H
X
All Output Enabled, Clock 1 selected, Control Register disabled
H
L
First stage stores "L", other stages store the data of previous stage
H
H
First stage stores "H", other stages store the data of previous stage
L
X
Reset of the state machine, Shift register and Control Register
SERIAL INPUT SEQUENCE
BIT#10
CLK_SEL
BIT#9
Q0
BIT#8
Q1
BIT#7
Q2
BIT#6
Q3
BIT#5
Q4
BIT#4
Q5
BIT#3
Q6
BIT#2
Q7
BIT#1
Q8
BIT#0
Q9
TRUTH TABLE OF THE CONTROL REGISTER
BIT#10
L
H
X
BIT#(0-9)
H
H
L
Qn(0-9)
Clock 0
Clock 1
Qn Output Disabled
TRUTH TABLE
CK
EN
SI
L
L
L
L
L
L
L
L
L
L
L
H
L
L
H
L
L
H
All drivers enable
CLK 0
L
H
Open
X
X
X
CLK 0
H
L
Open
X
X
X
CLK 1
X
X
X
L
H
Open
CLK 1
X
X
X
H
L
Open
Q (0-9)
L
H
L
L
H
L
Q(0-9)
H
L
H
H
L
H
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