AT76C002 Просмотр технического описания (PDF) - Atmel Corporation

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производитель

AT76C002

Programmable FIR Filter

Atmel Corporation 

AT76C002

Pin Description

Name

Function

VCC

Supply voltage

GND

Ground

CLOCK

Clock input

CKEN_SYNC Synchronous clock enable input

CKEN

Asynchronous clock enable input

RESET

Master reset input

ADR

3 bit microprocessor interface input address bus

DATA

16 bit microprocessor interface bidirectional data bus

RD

Microprocessor interface read input

WR/DS

Microprocessor interface write/data strobe input

CS

Microprocessor interface chip select input

MOTO/

nINTEL

Microprocessor interface configuration selection input

SEN

Sample enable input

FXP

16 bit forward delay line input (for cascadability)

FXN

16 bit forward delay line output (for cascadability)

BXP

16 bit backward delay line output (for cascadability)

BXN

16 bit backward delay line input (for cascadability)

PRA

32 bit intermediate result input bus (for cascadability)

SF

2 bit output configuration input bus

DOUT

32 bit filter output bus

OUT_DEN Output data valid

ENA0

Least significant 16 bit data out enable (active high)

ENA0_N

Least significant 16 bit data out enable (active low)

ENA1

Most significant 16 bit data out enable (active high)

ENA1_N

Most significant 16 bit data out enable (active low)

Arithmetic Precision

The AT76C002 includes several features to tune the dy-

namic of the output results. First of all, the 32 bit output of

the FIR structure can be divided by 256 (8 bit down

shifter), divided by 1 to 256 (0 to 8 bit down shifter), and

then bits 23 to 8 of the data can be multiplied by a 10 bit

gain. All features are accessible via the microprocessor

bus. These features are useful in cascade mode be-

cause, in long filters, most of the coefficients are very low

compared with the central ones. Consequently, in a cas-

cade chain, for a device which implements a part of the

filter with low coefficients, the coefficients can be tuned in

order to use as much as possible the whole 12 bit dy-

namic. The result is then re-tuned before being transmit-

ted to the next device in the cascade chain.

Microprocessor Interface

The AT76C002 contains a 16 bit microprocessor interface

which can be configured, using the MOTO/nINTEL input,

to have a Motorola or Intel compatible protocol. In Mo-

torola mode, the protocol uses CS (Chip Select), DS (Data

Strobe) and RDW (Read/nWrite) signals. In Intel mode,

the protocol uses CS (Chip Select), DS/WR (Write) and

RDWR (Read) signals.

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