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MAX4518ESD Просмотр технического описания (PDF) - Maxim Integrated

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MAX4518ESD Datasheet PDF : 12 Pages
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Precision, 4-Channel/Dual 2-Channel,
Low-Voltage, CMOS Analog Multiplexers
__________Applications Information
Operation with Supply Voltages
Other than ±5V
Using supply voltages less than ±5V reduces the analog
signal range. The MAX4518/MAX4519 muxes operate
with ±2.7V to ±8V bipolar supplies or with a +2.7V to
+15V single supply. Connect V- to GND when operating
with a single supply. Both device types can also operate
with unbalanced supplies, such as +10V and -5V. The
Typical Operating Characteristics graphs show typical
on-resistance with ±3V, ±5V, +3V and +5V supplies.
(Switching times increase by a factor of two or more for
operation at 5V.)
Overvoltage Protection
Proper power-supply sequencing is recommended for
all CMOS devices. Do not exceed the absolute maxi-
mum ratings, because stresses beyond the listed rat-
ings can cause permanent damage to the devices.
Always sequence V+ on first, then V-, followed by the
logic inputs, NO, or COM. If power-supply sequencing
is not possible, add two small signal diodes (D1, D2) in
series with supply pins for overvoltage protection
(Figure 1). Adding diodes reduces the analog signal
range to one diode drop below V+ and one diode drop
+5V
D1
V+
MAX4518
MAX4519
*
*
COM
NO
*
*
V-
D2
-5V * INTERNAL PROTECTION DIODES
Figure 1. Overvoltage Protection Using External Blocking Diodes
above V-, but does not affect the devices’ low switch
resistance and low leakage characteristics. Device
operation is unchanged, and the difference between
V+ and V- should not exceed 17V. These protection
diodes are not recommended when using a single supply.
______________________________________________Test Circuits/Timing Diagrams
+5V
V+
EN
V+
NO1
+5V
NO2–NO3
A0 MAX4518 NO4
-5V
A1
COM
GND
50
V-
300
+5V -5V
V+
EN
V+
NO1B
+5V
COMA, NO1A–NO2A
A0
A1 MAX4519 NO2B
-5V
COMB
GND
V-
50
300
-5V
VOUT
35pF
VOUT
35pF
LOGIC +3V
INPUT
VEN
0V
VNO1A, VNO1B
SWITCH
OUTPUT
VOUT 0V
VNO4, VNO2B
tR < 20ns
50%
tF < 20ns
90%
90%
tTRANS
tTRANS
Figure 2. Transition Time
8 _______________________________________________________________________________________

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