WM8148 Просмотр технического описания (PDF) - Wolfson Microelectronics plc
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WM8148 Datasheet PDF : 43 Pages
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WM8148
INPUT VIDEO SAMPLING (INTERNAL VSMP)
tPER
MCLK
VSMP,
OUTPUT
SDO,
OUTPUT
tVSMPPD
tSDOPD
tVSMPPD
tSDOPD
tVSU
tVH
VIDEO
Production Data
tRSU
tRH
Figure 2 Input Video Timing (Internal VSMP)
TEST CONDITIONS
AVDD = 4.75 to 5.25V, DVDD1 and DVDD2 = 2.97 to 5.25V, AGND = DGND = 0V, TA = 0 to 70°C, MCLK = 48MHz unless
otherwise stated (AVDD denotes the voltage applied to all AVDD pins).
PARAMETER
MCLK period
MCLK duty cycle
SYMBOL TEST CONDITIONS
MIN
TYP
MAX
UNITS
tPER
20.8
ns
45
55
%
VSMP output propagation delay
SDO output propagation delay
Video level set-up time
Video level hold time
Reset level set-up time
Reset level hold time
tVSMPPD
tSDOPD
tVSU
tVH
tRSU
tRH
CLOAD = 10pF
CLOAD = 10pF
15
25
ns
20
35
ns
10
ns
10
ns
10
ns
10
ns
Notes: 1.
2.
3.
tVSU and tRSU denote the set-up time required from when the input video signal has settled.
The reset sample point may be relative to either the rising or the falling edge of MCLK, depending on the setting of
control bits RESREF[3:0].
Parameters are measured at 50% of the rising/falling edge.
WOLFSON MICROELECTRONICS LTD
PD Rev 4.0 April 1999
8
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