AD7545JN Просмотр технического описания (PDF) - Intersil
Номер в каталоге
Компоненты Описание
производитель
AD7545JN Datasheet PDF : 8 Pages
| |||
AD7545
Absolute Maximum Ratings
Supply Voltage (VDD to DGND). . . . . . . . . . . . . . . . . . . -0.3V, +17V
Digital Input Voltage to DGND . . . . . . . . . . . . . . . . -0.3V, VDD +0.3V
VRFB, VREF to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V
VPIN1 to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V, VDD +0.3V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V, VDD +0.3V
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
80
Maximum Junction Temperature (PDIP Package) . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
PARAMETER
TA = See Note 2, VREF = +10V, VOUT1 = 0V, AGND = DGND, Unless Otherwise Specified
VDD = +5V (NOTE 7)
VDD = +15V (NOTE 7)
TEST CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
STATIC PERFORMANCE
Resolution
12
-
-
12
-
-
Relative Accuracy
J
-
-
±2
-
-
±2
K
-
-
±1
-
-
±1
Differential Nonlinearity
Gain Error
(Using Internal RFB)
J 10-Bit Monotonic TMIN to TMAX
-
K 12-Bit Monotonic TMIN to TMAX
-
J DAC Register Loaded with
-
1111 1111 1111
-
±4
-
-
±1
-
-
±20
-
-
±4
-
±1
-
±25
K Gain Error is Adjustable
Using the Circuits of
Figures 5 and 6 (Note 3)
-
-
±10
-
-
±15
Gain Temperature Coefficient
∆Gain/∆Temperature
Typical Value is 2ppm/oC for
VDD = +5V (Note 4)
-
-
±5
-
-
±10
DC Supply Rejection
∆Gain/∆VDD
∆VDD = ±5%
0.015
-
0.03 0.01
-
0.02
Output Leakage Current at J, K DB0 - DB11 = 0V; WR,
OUT1
CS = 0V (Note 2)
-
-
50
-
-
50
DYNAMIC CHARACTERISTICS
Current Settling Time
To 1/2 LSB, OUT1 LOAD = 100Ω,
-
-
2
-
-
2
DAC Output Measured from Falling
Edge of WR, CS = 0V (Note 4)
Propagation Delay from Digital Input OUT1 LOAD = 100Ω ,
-
-
300
-
-
250
Change to 90% of Final Analog Output CEXT = 13pF (Notes 4 and 5)
Digital to Analog Glitch Impulse
VREF = AGND
-
400
-
-
250
-
AC Feedthrough at OUT1
VREF = ±10V, 10kHz Sinewave
-
5
-
-
5
-
ANALOG OUTPUTS
Output Capacitance
COUT1 DB0 - DB11 = 0V,
WR, CS = 0V (Note 4)
-
-
70
-
-
70
DB0 - DB11 = VDD,
WR, CS = 0V (Note 4)
-
-
200
-
-
200
UNITS
Bits
LSB
LSB
LSB
LSB
LSB
LSB
ppm/oC
%
nA
µs
ns
nV/s
mVP-P
pF
pF
2
Share Link: 