LTC1279 Просмотр технического описания (PDF) - Linear Technology
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LTC1279 Datasheet PDF : 16 Pages
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TI I G CHARACTERISTICS (Note 5)
The q indicates specifications which apply over the full operating
temperature range; all other limits and typicals TA = 25°C.
Note 1: Absolute maximum ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to ground with DGND and
AGND wired together (unless otherwise noted).
Note 3: When the analog input voltage is taken below VSS (ground for
unipolar mode) or above VDD, it will be clamped by internal diodes. This
product can handle input currents greater than 80mA below VSS (ground
for unipolar mode) or above VDD without latch-up.
Note 4: When these pin voltages are taken below VSS (ground for unipolar
mode), they will be clamped by internal diodes. This product can handle
input currents greater than 60mA below VSS (ground for unipolar mode)
without latch-up. These pins are not clamped to VDD.
Note 5: AVDD = DVDD = VDD = 5V, (VSS = – 5V for bipolar mode), fSAMPLE =
600kHz, tr = tf = 5ns unless otherwise specified.
Note 6: Linearity, offset and full scale specifications apply for unipolar and
bipolar modes.
LTC1279
Note 7: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve. The
deviation is measured from the center of the quantization band.
Note 8: Bipolar offset is the offset voltage measured from – 1/2LSB when
the output code flickers between 0000 0000 0000 and 1111 1111 1111.
Note 9: Guaranteed by design, not subject to test.
Note 10: The AC test is for bipolar mode. The signal-to-noise plus
distortion ratio is about 1dB lower for unipolar mode, so the typical
S/(N + D) at 100kHz in unipolar mode is 71dB.
Note 11: Recommended operating conditions.
Note 12: AIN must not exceed VDD or fall below VSS by more than 50mV for
specified accuracy. Therefore the minimum supply voltage for the unipolar
mode is 4.95V. The minimum for the bipolar mode is 4.75V, – 2.45V.
Note 13: The falling CONVST edge starts a conversion. If CONVST returns
high at a bit decision point during the conversion it can create small errors.
For best performance ensure that CONVST returns high either within 120ns
after conversion start (i.e., before the first bit decision) or after BUSY rises
(i.e., after the last bit test). See mode 1a and 1b (Figures 12 and 13) timing
diagrams.
TYPICAL PERFORMANCE CHARACTERISTICS
Integral Nonlinearity vs
Output Code
1.0
fSAMPLE = 600kHz
0.5
0
–0.5
–1.0
0
512 1024 1536 2048 2560 3072 3584 4096
OUTPUT CODE
1279 G01
Differential Nonlinearity vs
Output Code
1.0
fSAMPLE = 600kHz
0.5
0
–0.5
–1.0
0
512 1024 1536 2048 2560 3072 3584 4096
OUTPUT CODE
1279 G02
ENOBs and S/(N + D) vs
Input Frequency
12
11
10
NYQUIST
9
FREQUENCY
8
7
6
5
4
3
2
1 fSAMPLE = 600kHz
0
10k
100k
1M
FREQUENCY (Hz)
74
68
62
56
50
5M
1279 G03
5
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