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HI5800(1999) Просмотр технического описания (PDF) - Intersil

Номер в каталоге
Компоненты Описание
производитель
HI5800
(Rev.:1999)
Intersil
Intersil Intersil
HI5800 Datasheet PDF : 15 Pages
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HI5800
Electrical Specifications AVCC = +5V, DVCC = +5V, AVEE = -5V, DVEE = -5V; Internal Reference Used,
Unless Otherwise Specified (Continued)
HI5800JCD
0oC TO 70oC
HI5800KCD, HI5800BID
0oC TO 70oC
-40oC TO 85oC
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
MIN
Data Access from OE Low, t12
(Note 3)
LSB, Nibble Delay from A0 High, t13 (Note 3)
MSB Delay from A0 Low, t14
(Note 3)
CS to Float Delay, t15
(Note 3)
Minimum CS Pulse, t16
(Notes 3, 5)
CS to Data Valid Delay, t17
(Note 3)
Output Fall 2 Time, tf
(Note 3)
Output Rise Time, tr
(Note 3)
POWER SUPPLY CHARACTERISTICS
10
18
25
10
-
10
20
-
-
14
20
-
10
18
25
10
15
-
-
15
10
18
25
10
-
5
20
-
-
5
20
-
IVCC
IVEE
IDVCC
IDVEE
Power Dissipation
-
170
220
-
-
150
190
-
-
24
40
-
-
2
5
-
-
1.7
2.2
-
PSRR
NOTES:
VCC, VEE ±5%
-
0.01
-
-
2. Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.
3. Parameter guaranteed by design or characterization and not production tested.
4. Recommended pulse width for CONV is 60ns.
5. Recommended minimum pulse width is 25ns.
6. This is the additional current available from the REFOUT pin with the REFOUT pin driving the REFIN pin.
7. The A0 pin VIH at -40oC may exceed 2.0V by up to 0.4V at initial power up.
8. Excludes error due to internal reference temperature drift.
TYP
MAX
18
25
10
20
14
20
18
25
-
-
18
25
5
20
5
20
170
220
150
190
24
40
2
5
1.7
2.2
0.01
-
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
mA
mA
mA
mA
W
%/%
Timing Diagrams
CONV
t1
CS
t16
t7
IRQ ACQUIRE N
N CONVERSION
t8
DATA VALID
N - 1 DATA
N DATA
AO
OE
D0 - D11, OVF
5
t15
N DATA
t12
t17
FIGURE 1. SINGLE SHOT TIMING

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