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LTC1659CMS8

12-Bit Rail-to-Rail Micropower DAC in MSOP Package

Linear Technology 

LTC1659

APPLICATIONS INFORMATION

Rail-to-Rail Output Considerations

In any rail-to-rail DAC, the output swing is limited to volt-

ages within the supply range.

If the DAC offset is negative, the output for the lowest

codes limits at 0V as shown in Figure 1b.

Similarly, limiting can occur near full scale when the REF

pin is tied to VCC. If VREF = VCC and the DAC full-scale

error (FSE) is positive, the output for the highest codes

limits at VCC as shown is Figure 1c. No full-scale limiting

can occur if VREF is less than VCC – FSE.

Offset and linearity are defined and tested over the region

of the DAC transfer function where no output limiting can

occur.

VREF = VCC

POSITIVE

FSE

OUTPUT

VOLTAGE

OUTPUT

VOLTAGE

VREF = VCC

INPUT CODE

(1c)

OUTPUT

VOLTAGE

0

2048

4095

INPUT CODE

(1a)

0V

NEGATIVE

OFFSET

INPUT CODE

(1b)

1659 F01

Figure 1. Effects of Rail-to-Rail Operation on a DAC Transfer Curve

(1a) Overall Transfer Function

(1b) Effect of Negative Offset for Codes Near Zero Scale

(1c) Effect of Positive Full-Scale Error for Input Codes Near Full Scale When VREF = VCC

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