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SAB9075H Просмотр технического описания (PDF) - Philips Electronics

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SAB9075H Datasheet PDF : 40 Pages
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Philips Semiconductors
Picture-in-Picture (PIP) controller for NTSC
Preliminary specification
SAB9075H
PINNING
SYMBOL PIN
I/O
MPVDDA
1
I/O
MPVSSA
2
I/O
MHsync
3
I
MPIbias
4
I
MPVSSD
5
I/O
MTCLK
6
I
MPVDDD
7
I/O
MVDDD
8
I/O
MVSSD
9
I/O
DAVDDD
10
I/O
DAVSSD
11
I/O
n.c.
12
DAVrefTU
13
I/O
DU
14
O
DAVrefTV
15
I/O
DV
16
O
DAVrefTY
17
I/O
DY
18
O
DAIbias
19
I
DAVSSA
20
I/O
DAVDDA
21
I/O
I2CVDD
22
I/O
MVsync
23
I
DBF
24
O
DAI5
25
I
DAI4
26
I
SC
27
O
DAI7
28
I
DAI0
29
I
DAI6
30
I
DAI1
31
I
DT
32
O
DAI3
33
I
DAO7
34
O
DAI2
35
I
DAO0
36
O
DAO6
37
O
DAO3
38
O
DAO1
39
O
DAO2
40
O
February 1995
TYPE
E030
E009
E027
E027
E009
HPP01
E030
E030
E009
E030
E009
E027
E027
E027
E027
E027
E027
E027
E009
E030
E030
HPP01
SPF20
HPP01
HPP01
OPF20
HPP01
HPP01
HPP01
HPP01
OPF20
HPP01
OPF20
HPP01
OPF20
OPF20
OPF20
OPF20
OPF20
DESCRIPTION
analog positive power supply for PLL main-channel
analog negative power supply for PLL main-channel
horizontal synchronization for main-channel
analog bias reference current for PLL main-channel
digital negative power supply for PLL main-channel
test clock for main-channel
digital positive power supply for PLL main-channel
digital positive power supply for main-channel core
digital negative power supply for main-channel core
digital positive power supply for DACs
digital negative power supply for DACs
not connected
analog reference voltage for top U DAC
analog U output
analog reference voltage for top V DAC
analog V output
analog reference voltage for top Y DAC
analog Y output
analog bias reference current for DACs
analog negative power supply for DACs
analog positive power supply for DACs
positive supply for HUE and SAT decoders
vertical synchronization for main-channel
fast blanking control output signal
data bus input from memory; bit 5
data bus input from memory; bit 4
memory shift clock
data bus input from memory; bit 7
data bus input from memory; bit 0
data bus input from memory; bit 6
data bus input from memory; bit 1
memory data transfer; active LOW
data bus input from memory; bit 3
data bus output to memory; bit 7
data bus input from memory; bit 2
data bus output to memory; bit 0
data bus output to memory; bit 6
data bus output to memory; bit 3
data bus output to memory; bit 1
data bus output to memory; bit 2
5

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