M65664FP Просмотр технического описания (PDF) - MITSUBISHI ELECTRIC
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производитель
M65664FP Datasheet PDF : 14 Pages
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MITSUBISHI DIGITAL TV ICs
M65664FP
PICTURE-IN-PICTURE
SIGNAL PROCESSING
Internal register information
address bit
symbol
00h <7> DISP
<6> SIZE_V
<5> SIZE_H
<4> WEN
<3> BGC
<2> BGCS
<1> FREE_RUN
<0> RVS
01h <7:0> VXA<7:0>
02h <7:0> HXA<7:0>
03h <7> DECODE
<6:0> CONTRAST<6:0>
04h <7> KILLER
<6:0> U_DAC<6:0>
05h <7> GRC
<6> YUVN_RGB_SEL
<5:0> TINT<5:0>
06h <7:6> EXT_SC_SEL<1:0>
Reset val.1/9 ex.
remarks
0 1 Sub picture display : [0] off, [1] on
0 0 Sub picture vertical size : [0] 1/9, [1] 1/16
0 0 Sub picture horizontal size : [0] 1/9, [1] 1/16
0 1 Sub picture : [0] Still, [1] Moving
0 0 Back ground display : [0] off, [1] on
0 0 Sub picture mute : [0] off, [1] on
0 VCXO ocsilation : [0] Lock, [1] Free run
0 0 HD/VD input synchronous mode selection : [0] sync., [1] async.
20h Sub picture vertical position
20h Sub picture horizontal position
0 0 Sub picture color decoder reset : [1] reset
32h Sub picture Y or R DAC output amplitude control
0 0 Sub picture color killer : [0] enable, [1] disable
32h Sub picture U or G DAC output amplitude control
1 Frame display : [0] off, [1] on
0 0 PIP output mode selection : [0] YUV, [1] RGB
00h 00h Sub picture tint control
0h 0h Sub picture C-Sync sep. input selection :
[0] Digital, [1] 23 pin input, [2] external (18 pin), [3] Int. analog
<5> HIMPRV
<4> SUBINPUT
<3:0> HT<3:0>
07h <7:6> EXPORT<1:0>
<5:0> BG_START<5:0>
0 0 H jitter improvement circuit : [0] off, [1] on
0 0 Sub picture input level : [0] 33% bigger : [0] same with M65669
Ah Sub picture display timing adjust
2h Ext. port (7 pin) : [0or1] Sub BGP, [2]"0" output, [3]"1" output
0Eh Sub picture BGP position setting
08h <7:4> ADJ<3:0>
<3:0> YDL<3:0>
2h Main/Sub switch delay control
5h Sub picture Y/C delay adjust
09h <7:5> BGBY<2:0>
0h
<4:0> Y_OFFSET<4:0>
0Ah <7> VCHIP_ONLY
0
<6:4> BGRY<2:0>
0h
<3:0> BGY<3:0>
0Bh <7:4> PEDESTV<3:0>
0h
<3:0> PEDESTU<3:0>
0h
0Ch <7> UV_FILTER_OFF
0
<6> SET_ACC
0
<5:4> SYSTEM_MODE<1:0> 0h
<3> SET_SIZE
0
<2> SET_VCHIP
0
<1> INV_UV
0
<0> CROSS_SEL
0
0Dh <7:6> SYNC_DELAY<1:0>
0h
<5:4> DCONT<1:0>
0h
<3> C_GAIN_SEL
0
<2> AUTOAFC
0h
<1> SUBINPUTB
0h
<0> CVF
0h
0Eh <7> BITSEL
0
<6> AFCBITSEL
0
<5:0> ACC_LEVEL<5:0>
0Fh <7> AUTO_ENABLE
0
<6> BURST_CLOCK_MODE 0
<5> PALN_ENABLE
0
<4> INV_WFF
0
<3> INV_RFF
0
<2> ERRSEL
0
<1> RFF_FIX
0
<0> AUTO_RFF_FIX
0
0h Back ground U level setting
0Fh Sub picture Y bright control
0 V-chip decode mode : [0] off, [1] on
0h Back ground V level setting
Ch Back ground Y level setting
0h Sub picture V pedestal level (2's comp)
0h Sub picture U pedestal level (2's comp)
0 Sub picture U, V output filter : [0]on, [1]off
0 Address 0Dh, 0Eh setting mode : [0]default, [1] enable to set
0h System : [0]NTSC , [1]PAL-M, [2]PAL-N, [3] N.A.
0 Address 11h - 14h setting mode : [0]default, [1] enable to set
0 Address 15h - 17h setting mode : [0]default , [1] enable to set
0 Invert U, V output value : [0] normal, [1] invert
0 Sub picture read mode : [0] pixel based, [1] H based
0h Sub picture sync.delay control
0h Sub picture digital sync sep.threshold setting
0 Sub picture chroma : [0] x1, [1] x2
0h for test : 0 set only
0h for test : 0 set only
0h Internal chroma comb filter : [0] on : [0] off
0 Sub picture Y clamp time constant : [0] x2, [1] x1
0 Sub picture AFC time constant : [0] x2, [1] x1
15h Sub picture color decoder amplitude
0 System automatic judgment : [0] off, [1] on
0 VCXO mode selection : [0] 1H based, [1] 2H based
0 Main picture PAL-N : [0] enable, [1] disable
0 Invert sub picture field definition : [0] normal, [1] invert
0 Invert main picture field definition : [0] normal, [1] invert
0 for test : 0 set only
0 Main picture field fix : [0] not fix, [1]fix
1 Automatic 50/60Hz Judgement : [0] enable, [1] disable
8
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