ML4824IS1 Просмотр технического описания (PDF) - Fairchild Semiconductor

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ML4824IS1

Power Factor Correction and PWM Controller Combo

Fairchild Semiconductor 

PRODUCT SPECIFICATION

ML4824

Electrical Characteristics (continued)

Unless otherwise specified, ICC = 25mA, RT = 52.3kΩ, CT = 470pF, TA = Operating Temperature Range (Note 1)

Symbol

Parameter

Line Regulation

Load Regulation

Temperature Stability

Conditions

VCCZ - 3V < VCC < VCCZ - 0.5V

1mA < I(VREF) < 20mA

Min. Typ. Max. Units

2 10 mV

2 15 mV

0.4

%

Total Variation

Line, Load, Temp

7.35

7.65 V

PFC

Long Term Stability

TJ = 125˚C, 1000 Hours

5 25 mV

Minimum Duty Cycle

Maximum Duty Cycle

Output Low Voltage

Output High Voltage

PWM

Rise/Fall Time

VIEAO > 4.0V

VIEAO < 1.2V

IOUT = -20mA

IOUT = -100mA

IOUT = 10mA, VCC = 8V

IOUT = 20mA

IOUT = 100mA

CL = 1000pF

0%

90 95

%

0.4 0.8 V

0.8 2.0 V

0.7 1.5 V

10 10.5

V

9.5 10

V

50

ns

Duty Cycle Range

ML4824-1

0-44 0-47 0-50 %

ML4824-2

0-37 0-40 0-45 %

Output Low Voltage

Output High Voltage

Rise/Fall Time

Supply

IOUT = -20mA

IOUT = -100mA

IOUT = 10mA, VCC = 8V

IOUT = 20mA

IOUT = 100mA

CL = 1000pF

0.4 0.8 V

0.8 2.0 V

0.7 1.5 V

10 10.5

V

9.5 10

V

50

ns

Shunt Regulator Voltage (VCCZ)

VCCZ Load Regulation

VCCZ Total Variation

Start-up Current

Operating Current

Undervoltage Lockout Threshold

25mA < ICC < 55mA

Load, Temp

VCC = 11.8V, CL = 0

VCC < VCCZ - 0.5V, CL = 0

12.8 13.5 14.4 V

±100 ±300 mV

12.4

14.6 V

0.7 1.0 mA

16 19 mA

12 13 14 V

Undervoltage Lockout Hysteresis

2.7 3.0 3.3 V

Notes

1. Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.

2. Includes all bias currents to other circuits connected to the VFB pin.

3. Gain = K x 5.3V; K = (IGAINMOD - IOFFSET) x IAC x (VEAO - 1.5V)-1.

REV. 1.0.6 11/7/03

5

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