µPD705101
Pin Name
INTP10
INTP11
INTP12
INTP13
INTP00-INTP03
HLDRQ
HLDAK
NMI
RESET
PORT0
PORT1
PORT2
X1
X2
CLKOUT
DCK
DDI
DDO
DMS
DRST
TRCDATA0-
TRCDATA3
VDD
GND
VDD_PLL
GND_PLL
I/O
Input
Interrupt request
Function
Output
Input
I/O
Bus request
Bus enable
Non-maskable interrupt request
System reset
Port
–
Input
Output
Input
3-state output
Input
Output
Connects crystal resonator. (Opened when external clock is
input.)
Connects crystal resonator or inputs external clock.
Bus clock output
Debug clock input
Debug data input
Debug data output
Debug mode select
Reset input (debug module)
Trace data output
(2/2)
Multiplexed Pin
TO10
–
TO11
–
–
–
–
–
–
SCLK
SO
SI
–
–
–
–
–
–
–
–
–
–
Positive power supply
–
Ground potential
–
Positive power supply for PLL (internal clock generator)
–
Ground potential for PLL (internal clock generator)
–
7