W83628F & W83629D
8.13 WISA_FAD0MC-ISA BRIDGE FAST DECODERS # 2 MASK CONTROL REGISTER
Address Offset:
5Ah
Default Value:
00h
Attribute:
Read/Write
This register is used to mask address bits(A7~A0) for fast address decoder # 2, if the corresponding
bit of this register is set to a 1, the corresponding address bit(A7~A0) is ignore by the faster address
decoder # 2.
8.14 WISA_FAD0MC-ISA BRIDGE FAST DECODERS # 3 MASK CONTROL REGISTER
Address Offset:
5Bh
Default Value:
00h
Attribute:
Read/Write
This register is used to mask address bits(A7~A0) for fast address decoder # 3, if the corresponding
bit of this register is set to a 1, the corresponding address bit(A7~A0) is ignore by the faster address
decoder # 3.
8.15 WISA_FAD0MC-ISA BRIDGE FAST DECODERS # 4 MASK CONTROL REGISTER
Address Offset:
5Ch
Default Value:
00h
Attribute:
Read/Write
This register is used to mask address bits(A7~A0) for fast address decoder # 4, if the corresponding
bit of this register is set to a 1, the corresponding address bit(A7~A0) is ignore by the faster address
decoder # 4.
8.16 WISA_FAD0MC-ISA BRIDGE FAST DECODERS # 5 MASK CONTROL REGISTER
Address Offset:
5Dh
Default Value:
00h
Attribute:
Read/Write
This register is used to mask address bits(A7~A0) for fast address decoder # 5, if the corresponding
bit of this register is set to a 1, the corresponding address bit(A7~A0) is ignore by the faster address
decoder # 5.
8.17 WISA_FAD0MC-ISA BRIDGE FAST DECODERS # 6 MASK CONTROL REGISTER
Address Offset:
5Eh
Default Value:
Attribute:
00h
Read/Write
This register is used to mask address bits(A7~A0) for fast address decoder # 6, if the corresponding
bit of this register is set to a 1, the corresponding address bit(A7~A0) is ignore by the faster address
decoder # 6.
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Publication Release Date: May 18, 2005
Revision A1