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SP8855 Просмотр технического описания (PDF) - Mitel Networks

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SP8855E
2.8GHz Parallel Load Professional Synthesiser
Advance Information
Supersedes version in January 1996 Professional Products IC Hanbook, HB2480-3.0
DS4239 - 3.0 March 1999
The SP8855E is one of a family of parallel load
synthesisers containing all the elements apart from the loop
amplifier to fabricate a PLL synthesis loop. Other devices in
the series are the SP8852E which is a fully programmable
device requiring two 16 bit words to set the RF and reference
counters, and the SP8854E which has hard wired reference
counter programming and requires a single bit word to pro-
gram the RF divider. The SP8855E replaces the existing
SP8855D.
The SP8855E is intended for applications where a fixed
synthesiser frequency is required although it can also be used
where frequency selection is set by switches. In general the
device will be programmed by connecting the programming
pins to either VCC or ground. Additional hard wired inputs can
be used to control the Fpd and Fref outputs set the control
direction of the loop and select the phase detector gain.
Another input may be used to disable the phase detector
output.
The device is available in both plastic (HP) and ceramic
(HC) J-leaded 44-lead chip carrier. Ambient temperature
ranges available are shown in the ordering information.
FEATURES
s 2.8GHz Operating Frequency (IG GRADE)
s Single 5V Supply Operation
s High Comparison Frequency 50MHz
s High Gain Phase Detector 1mA/rad
s Programmable Phase Detector Gain
s Zero "Dead Band" Phase Detector
s Wide range of RF and Reference Divide Ratios
s Programming by Hard Wired Inputs
s Low cost plastic package option
s GPS HI-REL level a screened option
ABSOLUTE MAXIMUM RATINGS
Supply voltage
-0.3V to 6V
Storage temperature
-65 °C to +150°C
Operating temperature
-55°C to +100°C
Prescaler & reference Input Voltage
2.5V p-p
Data Inputs
Junction temperature
VCC +0.3V
VEE -0.3V
+ 175°C (HC package)
+ 150°C (HP package)
PIN 1
OPTIONAL
PIN 1
REFERENCE
HC44
Pin Description
1
Input bus bit 10
2
Input bus bit 9
3
Input bus bit 8
4
Input bus bit 7
5
Input bus bit 6
6
Input bus bit 5
7
Input bus bit 4
8
Input bus bit 3
9
Input bus bit 2
10 Input bus bit 1
11 Input bus bit 0
12 0V (prescaler)
13 RF input
14 RF input
15
VCC + 5V (prescaler)
16
VEE 0V
17 Lock detect output
18 C-lock detect
19 Rset
20 Charge pump output
21 Charge pump ref.
22
Fref/Fpd enable
HP44
Pin Description
23 Control Direction
24
Fpd*
25
Fref*
26 +5V
27 Ref. osc capacitor
28 Ref in/XTAL
29 Reference bit 9
30 Reference bit 8
31 Reference bit 7
32 Reference bit 6
33 Reference bit 5
34 Reference bit 4
35 Reference bit 3
36 Reference bit 2
37 Reference bit 1
38 Reference bit 0
39 Phase Detect Enable
40 Phase Detect Gain 1
41 Phase Detect Gain 0
42 Input bus bit 13
43 Input bus bit 12
44 Input bus bit 11
*Fpd and Fref outputs are reversed using the Control Direction
input. The table above is correct when pin 23 is high.
Fig.1 Pin connections - top view

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