SP8852EKGHCAR Просмотр технического описания (PDF) - Mitel Networks
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SP8852EKGHCAR Datasheet PDF : 13 Pages
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SP8852E
ADDRESS
STROBE
CONTROL
MICRO
15V
SP8852E
27 28
33p
100p
10MHZ
1k
6 5 4 3 2 1 44 43 42 41 40
7
39
8
38
9
37
15V
1n
10
36
11
35
12
SP8852E
34
13
33
14
32
15
31
16
30
17
29
18 19 20 21 22 23 24 25 26 27 28
1n
1n
100p
1n
LOOP FILTER
*
**
130V
2·2k
15V
1µ
10n
REF IN
FREF
FPD
Application using
crystal reference
VCO
OP27
ETC
* VALUES DEPEND
ON APPLICATION
Fig. 5 Typical application diagram
DESCRIPTION
Prescaler and AM counter The programmable divider
chain is of A and M counter construction and therefore
contains a dual modulus front end prescaler, an A counter
which controls the dual modulus ratio and an M counter which
performs the bulk multi-modulus division. A programmable
divider of this construction has a division ratio of MN1A and
a minimum integer steppable division ratio of N(N21), where
N is the prescaler value.
Data Entry and Storage
Data is loaded from the 16-bit bus into one of the internal
buffers by applying a positive pulse to the STROBE input. The
input bus can be driven from TTL or CMOS logic levels. When
STROBE is low, the inputs are isolated and the data can be
changed without affecting the programmed state.
The data is loaded into the RF buffer when the address
input is high and into the reference buffer when low. When the
STROBE input is taken high, the A and M and reference
counters are reset and the input data is applied to the internal
storage register. When STROBE is again taken low, the data
on the input bus is stored in the selected register and the
counters released. The STROBE input is level triggered so
that if the data is changed whilst the input is high, the final
value before STROBE goes low will be stored.
In order to prevent disturbances on the VCO control voltage
when frequency changes are made, the STROBE input disables
6
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