LC72P366 Просмотр технического описания (PDF) - SANYO -> Panasonic
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LC72P366 Datasheet PDF : 14 Pages
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LC72P366
Electrical Characteristics in the Allowable Operating Ranges
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Input high-level current
IIH(1) XIN : VI = VDD = 5.0 V
2.0
5.0
15
µA
IIH(2) FMIN, AMIN, HCTR, LCTR : VI = VDD = 5.0 V
4.0
10
30
µA
Ports A, E, F, G, H, I, K, L, M, and Q,
SNS, HOLD, HCTR, LCTR, and with no
IIH(3) pull-down resistor on port A, VI = VDD = 5.0 V
With input mode selected for ports
3.0
µA
E, F, G, K, L, M, and Q
Input low-level current
IIH(4)
IIL(1)
IIL(2)
IIL(3)
Port A: pull-down resistor present
XIN:VI = VSS
FMIN, AMIN, HCTR, LCTR : VSS
Ports A, E, F, G, H, I, K, L, M, and Q,
SNS, HOLD, HCTR, LCTR, and with no
pull-down resistor on port A, VI = VSS
With input mode selected for ports E, F,
G, K, L, M, and Q
50
2.0
5.0
4.0
10
µA
15
µA
30
µA
3.0
µA
Input floating voltage
Pull-down resistance
Hysteresis
Output high-level voltage
Output low-level voltage
Output off leakage current
A/D conversion error
Rejected pulse width
Power down detection voltage
Current drain
VIF Port A: pull-down resistor present
0.05 VDD
V
RPD(1) Port A: pull-down resistor present VDD = 5 V
75
100
200
kΩ
RPD(2) TEST1, TEST2
10
kΩ
VH Ports F, G, and K, LCTR (in period measurement mode) 0.1 VDD 0.2 VDD
V
VOH(1) Ports B and C: IO = –1 mA
VDD – 2.0 VDD – 1.0
V
VOH(2) Ports D, E, F, G, K, L, M, N, O, P, and Q: IO = –1 mA VDD – 1.0
V
VOH(3) EO1, EO2, EO3, SUBPD : IO = –500 µA
VDD – 1.0
V
VOH(4) XOUT : IO = –200 µA
VDD – 1.0
V
VOL(1) Ports B and C: IO = 50 µA
1.0
2.0
V
VOL(2) Ports D, E, F, G, K, L, M, N, O, P, and Q: IO = 1 mA
1.0
V
VOL(3) EO1, EO2, EO3, SUBPD : IO = 500 µA
1.0
VOL(4) XOUT : IO = 200 µA
1.5
VOL(5) Port J: IO = 5 mA
2.0
V
IOFF(1) Ports B, C, D, E, F, G, K, L, M, N, O, P, and Q
–3.0
+3.0
µA
IOFF(2) EO1, EO2, EO3, SUBPD
–100
+100
nA
IOFF(3) Port J
–5.0
+5.0
µA
ADI0 to ADI5 : VDD(1)
–1/2
+1/2 LSB
PREJ SNS
50
µs
VDET
3.0
3.5
4.0
V
IDD(1) VDD(1) : fIN(2) = 130 MHz, Ta = 25˚C
12
24 mA
IDD(2) VDD(2): halt mode*, Ta = 25˚C (See figure 1.)
0.45
mA
IDD(3)
VDD = 5.5 V, oscillator stopped
Ta = 25˚C (See figure 2.)
5
µA
IDD(4)
VDD = 2.5 V, oscillator stopped
Ta = 25°C (See figure 2.)
1
µA
Note: * Executing 20 STEP instructions every millisecond. With the PLL and counter circuits stopped.
Test Circuit Diagrams
Note: With PB to PG, and PJ to PQ all open.
However, with PE to PG, PK to PM, and PQ selected for output.
Figure 1 IDD(2) in Halt Mode
Note: With PA to PQ all open.
Figure 2 IDD(3) and IDD(4) in Backup Mode
No. 5544-5/14
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