AD1803 Просмотр технического описания (PDF) - Analog Devices
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AD1803 Datasheet PDF : 32 Pages
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AD1803
GPIO PIN CONFIGURATION REGISTER
Address D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default
0x4C
0
0
0
0
0
0
0 0 GC7 GC6 GC5 GC4 GC3 GC2 GC1 GC0 0x00FF
This register is forced to its default only when power is first applied to the AD1803.
Bit Name
GC7 to
GC2, GC0
GC1
Description
General-Purpose I/O Pin Configuration. These bits define the directionality of GPIO pins with corresponding numbers. By default, all
GPIO pins serve as inputs, but with weak (~100 μA with a 3.3 V supply, ~140 μA with a 5.0 V supply) pull-up devices internal to the
AD1803 enabled. See Register 0x4E to disable these weak pull-up devices. Note that GPIO Pin 1 is always an input and cannot serve
as an output. Also, note that bits in this register are ignored if the GPIO pin they control has been assigned to serve an alternate
special purpose (see bits in Register by more than 0.3 V). GPIO Pin 1 is sourced by the analog supply (Pins AVDD and AGND). All
other GPIO pins are sourced by the digital supply (Pin DVDD and Pin DGND).
0 = GPIO pin serves as an output.
1 = GPIO pin serves as an input (default).
GPIO Pin 1 is always an input (default=1) and cannot serve as an output. Any writes to this register will be ignored.
GPIO PIN POLARITY/TYPE REGISTER
Address D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default
0x4E
0
0
0
0
0
0
0 0 GP7 GP6 GP5 GP4 GP3 GP2 GP1 GP0 0x00FF
This register is forced to its default only when power is first applied to the AD1803.
Bit Name
GP7 to GP0
Description
GPIO Input Polarity/Output Driver Type Select. These bits control GPIO pins with corresponding numbers. The effect they have is
dependent on GPIO pin directionality (see Register 0x4C). When a GPIO pin serves as an input, these bits select the logic level
necessary to set a sticky status bit which is used to trigger an interrupt (see Registers 0x50 and 0x52). When serving as an input,
these bits determine whether a weak pull-up receives a low, the weak pull-up is disabled. If an input is set to active low, and
therefore nominally receives a high, the weak pull-up is enabled. Meanwhile, when a GPIO pin serves as an output, these bits
determine whether a CMOS or open drain with weak pull-up driver is activated.
If a GPIO pin is defined as an input (corresponding GC bit in Register 0x4C is set to 1)
0 = Input is active high, weak pull-up disabled.
1 = Input is active low, weak pull-up enabled (default).
If a GPIO pin is defined as an output (corresponding GC bit in Register 0x4C is set to 0).
0 = Output driver is CMOS.
1 = Output driver is open drain with weak pull-up enabled (default).
GPIO STICKY PIN REGISTER
Address D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default
0x50
0
0
0
0
0
0
0 0 GS7 GS6 GS5 GS4 GS3 GS2 GS1 GS0 0x0000
This register is forced to its default only when power is first applied to the AD1803.
Bit Name
GS7 to GS0
Description
GPIO Sticky Control. These bits control GPIO pins with corresponding numbers. They determine whether a read of Register 0x54
returns either the current logic level received on a GPIO pin, or a sticky status bit which indicates if a selected logic level (see
Register 0x4E) has been received since this sticky status bit was last cleared. Sticky status bits are cleared by writes to their
associated control bits in Register 0x54, and whenever the current GPIO pin received logic level is selected as the Register 0x54
return value.
0 = Reads of Register 0x54 return current state of GPIO pin, sticky status bit cleared (default).
1 = Reads of Register 0x54 return a sticky status bit set by GPIO pin level selected by Register 0x4E.
Rev. A | Page 20 of 32
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