LH28F008SC Просмотр технического описания (PDF) - Sharp Electronics

Номер в каталоге

Компоненты Описание

производитель

LH28F008SC

8M (1M × 8) Flash Memory

Sharp Electronics 

8M (1M × 8) Flash Memory

LH28F008SC

START

WRITE 60H

WRITE D0H

READ STATUS REGISTER

SR.7 = 0

1

FULL STATUS

CHECK IF DESIRED

CLEAR BLOCK

LOCK-BITS COMPLETE

BUS

OPERATION

COMMAND

COMMENTS

Write

Write

Read

Clear Block Data = 60H

Lock-Bits Setup Addr = X

Clear Block

Lock-Bits

Confirm

Data = D0H

Addr = X

Status Register Data

Standby

Check SR.7

1 = WSM Ready

0 = WSM Busy

Write FFH after the Clear Block Lock-Bits operation to

place device in read array mode.

FULL STATUS CHECK PROCEDURE

READ STATUS

REGISTER DATA

(see above)

1

SR.3 =

0

1

SR.1 =

YES

1

SR.4, 5 =

VPP RANGE

ERROR

DEVICE

PROTECT

ERROR

COMMAND

SEQUENCE

ERROR

BUS

OPERATION

Standby

Standby

Standby

Standby

COMMAND

COMMENTS

Check SR.3

1 = VPP Error Detect

Check SR.1

1 = Device Protect Detect

RP = VIH, Master Lock-Bit is Set

Check SR.4, 5

Both 1 = Command

Sequence Error

Check SR.5

1 = Clear Block Lock-Bit Error

SR.5, SR.4, SR.3 and SR.1 are only cleared by the Clear Status

Register command.

If error is detected, clear the Status Register before attemping

retry or other error recovery.

1

SR.5 =

YES

CLEAR BLOCK

LOCK-BITS

SUCCESSFUL

CLEAR BLOCK

LOCK-BITS ERROR

Figure 11. Clear Block Lock-Bits Flowchart

28F008SC-11

19

Share Link: